From fc62013fd11662e8627ba55694c611e994705d0a Mon Sep 17 00:00:00 2001
From: Marc Jones <marcjones@sysproconsulting.com>
Date: Tue, 3 Nov 2020 09:58:26 -0700
Subject: mainboard/ocp/tiogapass: Add xeon_sp pch.asl

Use the xeon_sp pch.asl to include the intel common lpc.asl.

Change-Id: I22ee9d325888808a9c775ecee0591b661e2bba4e
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47305
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Reviewed-by: Javier Galindo <javiergalindo@sysproconsulting.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
---
 src/mainboard/ocp/tiogapass/dsdt.asl | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/mainboard')

diff --git a/src/mainboard/ocp/tiogapass/dsdt.asl b/src/mainboard/ocp/tiogapass/dsdt.asl
index ddc716093f..7905a9c5ef 100644
--- a/src/mainboard/ocp/tiogapass/dsdt.asl
+++ b/src/mainboard/ocp/tiogapass/dsdt.asl
@@ -15,4 +15,8 @@ DefinitionBlock(
 	#include <soc/intel/xeon_sp/acpi/globalnvs.asl>
 	#include <cpu/intel/common/acpi/cpu.asl>
 	#include <soc/intel/xeon_sp/acpi/uncore.asl>
+	Scope (\_SB.PC00)
+	{
+		#include <soc/intel/xeon_sp/acpi/pch.asl>
+	}
 }
-- 
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