From fbde1a5880ae6bacebe97a6a9d9386da5e69bc19 Mon Sep 17 00:00:00 2001
From: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Date: Thu, 1 Sep 2022 15:01:34 +0800
Subject: mb/google/rex: Enable DSP UPD

Enable DSP setting. Make sure the SSP can work as expected.

BUG=b:243123156
TEST=Dev beep working on Rex.

Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I6ae28e414ac4ac33f596df57691c979eac5fe132
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67270
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
---
 src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb | 5 +++++
 1 file changed, 5 insertions(+)

(limited to 'src/mainboard')

diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
index 3471c7e805..1f079e295c 100644
--- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
+++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
@@ -20,6 +20,11 @@ chip soc/intel/meteorlake
 		[PchSerialIoIndexUART2] = PchSerialIoDisabled,
 	}"
 
+	register "pch_hda_dsp_enable" = "1"
+	register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T"
+	register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"
+	register "pch_hda_idisp_codec_enable" = "1"
+
 	device domain 0 on
 		device ref igpu on end
 		device ref dtt on end
-- 
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