From f89c56a54d62495804167eef40b2718cfdade185 Mon Sep 17 00:00:00 2001 From: Hung-Te Lin Date: Thu, 13 Sep 2018 00:18:27 +0800 Subject: google/kukui: Notify EC that AP is in S0 We have a pin from AP to EC, called AP_IN_SLEEP_L (SRCLKENA0 on AP side, pad R23) that is supposed to be high in S0, and low in S3 (and X/don't care in S5). This should be set as early as possible in bootblock. BUG=b:113367227 TEST=make; boots and verified AP_IN_SLEEP_L GPIO is high. BRANCH=None Change-Id: Icd59fa366c162e7443b8932a851e65f110f551ab Signed-off-by: Hung-Te Lin Reviewed-on: https://review.coreboot.org/28585 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner --- src/mainboard/google/kukui/bootblock.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/mainboard') diff --git a/src/mainboard/google/kukui/bootblock.c b/src/mainboard/google/kukui/bootblock.c index a9bad4e0bc..07285882d7 100644 --- a/src/mainboard/google/kukui/bootblock.c +++ b/src/mainboard/google/kukui/bootblock.c @@ -21,6 +21,7 @@ #include "gpio.h" #define BOOTBLOCK_EN_L (GPIO(KPROW0)) +#define AP_IN_SLEEP_L (GPIO(SRCLKENA0)) void bootblock_mainboard_init(void) { @@ -29,6 +30,9 @@ void bootblock_mainboard_init(void) /* Turn on real eMMC. */ gpio_output(BOOTBLOCK_EN_L, 1); + /* Declare we are in S0 */ + gpio_output(AP_IN_SLEEP_L, 1); + mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 6 * MHz); mtk_spi_init(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, SPI_PAD0_MASK, 26 * MHz); } -- cgit v1.2.3