From f3c17ca23409078b7f77e4b200aee0fd22d0cabc Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Fri, 26 Sep 2003 22:10:53 +0000 Subject: via epia is putting out bytes! ron git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1153 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/via/epia/auto.c | 2 ++ src/mainboard/via/epia/failover.c | 17 ++++------------- 2 files changed, 6 insertions(+), 13 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/via/epia/auto.c b/src/mainboard/via/epia/auto.c index 859aadc614..31bb04363c 100644 --- a/src/mainboard/via/epia/auto.c +++ b/src/mainboard/via/epia/auto.c @@ -52,7 +52,9 @@ static inline int spd_read_byte(unsigned device, unsigned address) static void main(void) { + unsigned long x; /* init_timer();*/ + outb(5, 0x80); enable_vt8231_serial(); uart_init(); diff --git a/src/mainboard/via/epia/failover.c b/src/mainboard/via/epia/failover.c index 8eeeaef7e1..bd0df4e89d 100644 --- a/src/mainboard/via/epia/failover.c +++ b/src/mainboard/via/epia/failover.c @@ -5,20 +5,13 @@ #include #include "arch/romcc_io.h" #include "pc80/mc146818rtc_early.c" -#include "southbridge/amd/amd8111/amd8111_enable_rom.c" -#include "northbridge/amd/amdk8/early_ht.c" #include "cpu/p6/boot_cpu.c" -#include "northbridge/amd/amdk8/reset_test.c" static void main(void) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(0); - - /* Setup the 8111 */ - amd8111_enable_rom(); + /* for now, just always assume failure */ +#if 0 /* Is this a cpu reset? */ if (cpu_init_detected()) { if (last_boot_normal()) { @@ -27,12 +20,10 @@ static void main(void) asm("jmp __cpu_reset"); } } - /* Is this a secondary cpu? */ - else if (!boot_cpu() && last_boot_normal()) { - asm("jmp __normal_image"); - } + /* This is the primary cpu how should I boot? */ else if (do_normal_boot()) { asm("jmp __normal_image"); } +#endif } -- cgit v1.2.3