From f089f9b8c6fd72c068178bb2c94d0f96008c4612 Mon Sep 17 00:00:00 2001 From: Fred Reitberger Date: Thu, 9 Jun 2022 11:04:37 -0400 Subject: mb/chausie/ec: Set MS bit in SW02 Set the MS bit in EC SW02 register to enable s0i3 Signed-off-by: Fred Reitberger Change-Id: I97b6adf48b49635251c70015f1d87fd8ca11d539 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65070 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/mainboard/amd/chausie/ec.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/mainboard') diff --git a/src/mainboard/amd/chausie/ec.c b/src/mainboard/amd/chausie/ec.c index ac484b2174..a2ed4ed5b4 100644 --- a/src/mainboard/amd/chausie/ec.c +++ b/src/mainboard/amd/chausie/ec.c @@ -26,6 +26,9 @@ #define EC_GPIO_MP2_SEL (1 << 2) #define EC_GPIO_WWAN_N_LOM_SW (1 << 3) +#define EC_SW02_ADDR 0xB7 +#define EC_SW02_MS (1 << 7) + static void configure_ec_gpio(void) { uint8_t tmp; @@ -49,6 +52,10 @@ static void configure_ec_gpio(void) tmp = ec_read(EC_GPIO_C_ADDR); tmp |= EC_GPIO_WWAN_N_LOM_SW | EC_GPIO_MP2_SEL | EC_GPIO_DT_N_WLAN_SW; ec_write(EC_GPIO_C_ADDR, tmp); + + tmp = ec_read(EC_SW02_ADDR); + tmp |= EC_SW02_MS; + ec_write(EC_SW02_ADDR, tmp); } void chausie_ec_init(void) -- cgit v1.2.3