From e34a1f98151be7a58aaa4f6ec83f9cdd0a803ea1 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Tue, 9 Jan 2024 16:08:12 +0100 Subject: mb/pcengines/apu2/BiosCallOuts: don't have binaryPI clear LPC decodes Tell binaryPI to not disable the LPC decodes for the IO ports used by the serial ports on the Super I/O chip during the AmdInitReset binaryPI entry point. Checked the Stoneyridge binaryPI source code which is closely enough related to be reasonable sure that this option only controls which LPC decode bits get cleared and won't have any other side effects. TEST=Now the full console output from the APU2 board gets printed on the serial console. Signed-off-by: Felix Held Suggested-by: Krystian Hebel Change-Id: I91ef4423bd7bf6c1d7a175336f0f89479f2cde02 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79852 Reviewed-by: Paul Menzel Reviewed-by: Krystian Hebel Tested-by: build bot (Jenkins) --- src/mainboard/pcengines/apu2/BiosCallOuts.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard') diff --git a/src/mainboard/pcengines/apu2/BiosCallOuts.c b/src/mainboard/pcengines/apu2/BiosCallOuts.c index efd88d8c12..c78dda6ecb 100644 --- a/src/mainboard/pcengines/apu2/BiosCallOuts.c +++ b/src/mainboard/pcengines/apu2/BiosCallOuts.c @@ -45,7 +45,7 @@ void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams) { printk(BIOS_DEBUG, "Fch OEM config in INIT RESET "); //FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */ - FchParams->LegacyFree = CONFIG(HUDSON_LEGACY_FREE); + FchParams->LegacyFree = 0; /* don't clear LPC IO decodes for serial console */ FchParams->FchReset.SataEnable = hudson_sata_enable(); FchParams->FchReset.IdeEnable = hudson_ide_enable(); FchParams->FchReset.Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE); -- cgit v1.2.3