From e1c385ebe142845012e0a844d798fa7268c1cfd8 Mon Sep 17 00:00:00 2001 From: Lean Sheng Tan Date: Thu, 19 May 2022 09:55:20 +0200 Subject: mb/siemens/mc_ehl2: Quick fix for PSE TSN phy interface type Based on quick fix on this commit 7b0fe59be (soc/intel/ehl: Fix logical bug for PseTsnGbePhyInterfaceType), disable PSE TSN SGMII as the original intention is to set the PSE TSN phy interface as RGMII. Signed-off-by: Lean Sheng Tan Change-Id: Id2e05b19f156621a945110791038bc0d19a0aad0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64491 Tested-by: build bot (Jenkins) Reviewed-by: Mario Scheithauer --- src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index 9883fd92e4..81f68e2314 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -102,8 +102,6 @@ chip soc/intel/elkhartlake # TSN GBE related UPDs register "PchTsnGbeLinkSpeed" = "Tsn_1_Gbps" register "PchTsnGbeSgmiiEnable" = "1" - register "PseTsnGbeSgmiiEnable[0]" = "1" - register "PseTsnGbeSgmiiEnable[1]" = "1" register "PseDmaOwn[0]" = "Host_Owned" register "PseDmaOwn[1]" = "Host_Owned" -- cgit v1.2.3