From dfd52bd466485e73f1511e05ee7499b05413224b Mon Sep 17 00:00:00 2001 From: Kevin Chiu Date: Mon, 22 Feb 2021 11:31:57 +0800 Subject: mb/google/zork: Adjust Gumboz H1 I2C CLK Adjust H1 I2C CLK: 404kHz -> 391 kHz BUG=b:179753353 BRANCH=zork TEST=1. emerge-zork coreboot chromeos-bootimage 2. power on proto board successfully 3. measure i2c freq by scope is close to 400kHz Change-Id: Iedd47dd6fc4f7ac7f0aac480d63ddbdf85a84ec2 Signed-off-by: Kevin Chiu Reviewed-on: https://review.coreboot.org/c/coreboot/+/50994 Tested-by: build bot (Jenkins) Reviewed-by: Kangheui Won --- src/mainboard/google/zork/variants/gumboz/overridetree.cb | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/zork/variants/gumboz/overridetree.cb b/src/mainboard/google/zork/variants/gumboz/overridetree.cb index 73a4a282ff..1cbe0584be 100644 --- a/src/mainboard/google/zork/variants/gumboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/gumboz/overridetree.cb @@ -70,8 +70,8 @@ chip soc/amd/picasso # I2C3 for H1 register "i2c[3]" = "{ .speed = I2C_SPEED_FAST, - .rise_time_ns = 184, /* 0 to 1.26v (1.8 * .7) */ - .fall_time_ns = 42, /* 1.26v to 0 */ + .rise_time_ns = 98, /* 0 to 1.26v (1.8 * .7) */ + .fall_time_ns = 17, /* 1.26v to 0 */ .early_init = true, }" -- cgit v1.2.3