From d7e5f4b7c50eacf033154e2514a6bef3db80d4b5 Mon Sep 17 00:00:00 2001 From: Werner Zeh Date: Fri, 1 Feb 2019 12:39:40 +0100 Subject: mb/siemens/mc_apl1: Enable VTD for mc_apl2 and mc_apl5 These boards need a working VTD therefore enable this feature. Change-Id: I74c64bf1bd66188c4c32b85c66683dafd0e1fd38 Signed-off-by: Werner Zeh Reviewed-on: https://review.coreboot.org/c/31195 Tested-by: build bot (Jenkins) Reviewed-by: Mario Scheithauer --- src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb | 3 +++ src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb | 3 +++ 2 files changed, 6 insertions(+) (limited to 'src/mainboard') diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb index c362e6c0a9..7a0b8863d7 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb @@ -47,6 +47,9 @@ chip soc/intel/apollolake # 0:HS400(Default), 1:HS200, 2:DDR50 register "emmc_host_max_speed" = "2" + # Enable Vtd feature + register "enable_vtd" = "1" + device domain 0 on device pci 00.0 on end # - Host Bridge device pci 00.1 off end # - DPTF diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb index dfdfd551b4..989ab45699 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb @@ -46,6 +46,9 @@ chip soc/intel/apollolake # 0:HS400(Default), 1:HS200, 2:DDR50 register "emmc_host_max_speed" = "2" + # Enable Vtd feature + register "enable_vtd" = "1" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | -- cgit v1.2.3