From d37b7d89fd362242fd5da11303c7bb18bf78afcf Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 3 Jul 2020 23:52:34 +0200 Subject: haswell: Add function to retrieve SPD addresses And use it instead of directly writing to the MRC struct. Change-Id: I7f04db29a08512c1a8b2b2300dba71cb3b84a5c5 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/43127 Tested-by: build bot (Jenkins) Reviewed-by: Tristan Corrick --- src/mainboard/asrock/b85m_pro4/romstage.c | 13 +++++++++---- src/mainboard/asrock/h81m-hds/romstage.c | 9 +++++++-- src/mainboard/google/beltino/romstage.c | 9 +++++++-- src/mainboard/google/slippy/romstage.c | 9 +++++++-- src/mainboard/intel/baskingridge/romstage.c | 13 +++++++++---- src/mainboard/lenovo/t440p/romstage.c | 8 ++++++-- src/mainboard/supermicro/x10slm-f/romstage.c | 13 +++++++++---- 7 files changed, 54 insertions(+), 20 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/asrock/b85m_pro4/romstage.c b/src/mainboard/asrock/b85m_pro4/romstage.c index f625824a8c..6a71abbe30 100644 --- a/src/mainboard/asrock/b85m_pro4/romstage.c +++ b/src/mainboard/asrock/b85m_pro4/romstage.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include #include @@ -16,12 +17,16 @@ void mainboard_config_rcba(void) RCBA16(D20IR) = DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD); } +void mb_get_spd_map(uint8_t spd_map[4]) +{ + spd_map[0] = 0xa0; + spd_map[1] = 0xa2; + spd_map[2] = 0xa4; + spd_map[3] = 0xa6; +} + void mainboard_fill_pei_data(struct pei_data *pei_data) { - pei_data->spd_addresses[0] = 0xa0; - pei_data->spd_addresses[1] = 0xa2; - pei_data->spd_addresses[2] = 0xa4; - pei_data->spd_addresses[3] = 0xa6; pei_data->ec_present = 0; pei_data->gbe_enable = 1; diff --git a/src/mainboard/asrock/h81m-hds/romstage.c b/src/mainboard/asrock/h81m-hds/romstage.c index cfefdda6de..0573b6b171 100644 --- a/src/mainboard/asrock/h81m-hds/romstage.c +++ b/src/mainboard/asrock/h81m-hds/romstage.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include #include @@ -16,10 +17,14 @@ void mainboard_config_rcba(void) RCBA16(D20IR) = DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD); } +void mb_get_spd_map(uint8_t spd_map[4]) +{ + spd_map[0] = 0xa0; + spd_map[2] = 0xa4; +} + void mainboard_fill_pei_data(struct pei_data *pei_data) { - pei_data->spd_addresses[0] = 0xa0; - pei_data->spd_addresses[2] = 0xa4; pei_data->ec_present = 0; struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = { diff --git a/src/mainboard/google/beltino/romstage.c b/src/mainboard/google/beltino/romstage.c index 839cd6c743..8410d04923 100644 --- a/src/mainboard/google/beltino/romstage.c +++ b/src/mainboard/google/beltino/romstage.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include #include @@ -39,10 +40,14 @@ void mainboard_config_rcba(void) RCBA16(D23IR) = DIR_ROUTE(PIRQH, PIRQH, PIRQH, PIRQH); /* SDIO */ } +void mb_get_spd_map(uint8_t spd_map[4]) +{ + spd_map[0] = 0xa0; + spd_map[2] = 0xa4; +} + void mainboard_fill_pei_data(struct pei_data *pei_data) { - pei_data->spd_addresses[0] = 0xa0; - pei_data->spd_addresses[2] = 0xa4; pei_data->ec_present = 0; pei_data->dq_pins_interleaved = 1; pei_data->usb_xhci_on_resume = 1; diff --git a/src/mainboard/google/slippy/romstage.c b/src/mainboard/google/slippy/romstage.c index e5719448e4..47bcb477f5 100644 --- a/src/mainboard/google/slippy/romstage.c +++ b/src/mainboard/google/slippy/romstage.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include #include @@ -40,10 +41,14 @@ void mainboard_config_rcba(void) RCBA16(D23IR) = DIR_ROUTE(PIRQH, PIRQH, PIRQH, PIRQH); /* SDIO */ } +void mb_get_spd_map(uint8_t spd_map[4]) +{ + spd_map[0] = 0xff; + spd_map[2] = 0xff; +} + void mainboard_fill_pei_data(struct pei_data *pei_data) { - pei_data->spd_addresses[0] = 0xff; - pei_data->spd_addresses[2] = 0xff; pei_data->ec_present = 1; pei_data->usb_xhci_on_resume = 1; diff --git a/src/mainboard/intel/baskingridge/romstage.c b/src/mainboard/intel/baskingridge/romstage.c index 73fc54ecad..564177553d 100644 --- a/src/mainboard/intel/baskingridge/romstage.c +++ b/src/mainboard/intel/baskingridge/romstage.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include #include @@ -40,12 +41,16 @@ void mainboard_config_rcba(void) RCBA16(D22IR) = DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD); } +void mb_get_spd_map(uint8_t spd_map[4]) +{ + spd_map[0] = 0xa0; + spd_map[1] = 0xa2; + spd_map[2] = 0xa4; + spd_map[3] = 0xa6; +} + void mainboard_fill_pei_data(struct pei_data *pei_data) { - pei_data->spd_addresses[0] = 0xa0; - pei_data->spd_addresses[1] = 0xa2; - pei_data->spd_addresses[2] = 0xa4; - pei_data->spd_addresses[3] = 0xa6; pei_data->ec_present = 0; struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = { diff --git a/src/mainboard/lenovo/t440p/romstage.c b/src/mainboard/lenovo/t440p/romstage.c index 36787603bf..e83530a8ea 100644 --- a/src/mainboard/lenovo/t440p/romstage.c +++ b/src/mainboard/lenovo/t440p/romstage.c @@ -40,10 +40,14 @@ void mb_late_romstage_setup(void) } } +void mb_get_spd_map(uint8_t spd_map[4]) +{ + spd_map[0] = 0xa0; + spd_map[2] = 0xa2; +} + void mainboard_fill_pei_data(struct pei_data *pei_data) { - pei_data->spd_addresses[0] = 0xa0; - pei_data->spd_addresses[2] = 0xa2; pei_data->ec_present = 1; pei_data->gbe_enable = 1; diff --git a/src/mainboard/supermicro/x10slm-f/romstage.c b/src/mainboard/supermicro/x10slm-f/romstage.c index 26f820a5b5..036a89c805 100644 --- a/src/mainboard/supermicro/x10slm-f/romstage.c +++ b/src/mainboard/supermicro/x10slm-f/romstage.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include #include @@ -16,12 +17,16 @@ void mainboard_config_rcba(void) RCBA16(D20IR) = DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD); } +void mb_get_spd_map(uint8_t spd_map[4]) +{ + spd_map[0] = 0xa0; + spd_map[1] = 0xa2; + spd_map[2] = 0xa4; + spd_map[3] = 0xa6; +} + void mainboard_fill_pei_data(struct pei_data *pei_data) { - pei_data->spd_addresses[0] = 0xa0; - pei_data->spd_addresses[1] = 0xa2; - pei_data->spd_addresses[2] = 0xa4; - pei_data->spd_addresses[3] = 0xa6; pei_data->ec_present = 0; struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = { -- cgit v1.2.3