From d2032719bcddf114885d2241c5e24245398b1b11 Mon Sep 17 00:00:00 2001 From: Mario Scheithauer Date: Mon, 22 May 2023 15:29:29 +0200 Subject: mb/siemens/{mc_apl2,mc_apl5,mc_apl6}: Use SSD type for SATA ports There are only SSD connected to SATA ports on this mainboard. To prevent misbehavior, set the correct hard drive type for enabled SATA ports. BUG=none TEST=Boot into OS and check the stability of the SSD Change-Id: I2c2b0548865e87859a1d742295e09a731bfb3f76 Signed-off-by: Mario Scheithauer Reviewed-on: https://review.coreboot.org/c/coreboot/+/75367 Tested-by: build bot (Jenkins) Reviewed-by: Jan Samek --- src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb | 2 ++ src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb | 2 ++ src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb | 2 ++ 3 files changed, 6 insertions(+) (limited to 'src/mainboard') diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb index 2b2c32d083..129149711f 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb @@ -69,6 +69,8 @@ chip soc/intel/apollolake device pci 12.0 on # - SATA register "SataPortsEnable[0]" = "1" register "SataPortsEnable[1]" = "1" + register "sata_ports_ssd[0]" = "1" + register "sata_ports_ssd[1]" = "1" register "DisableSataSalpSupport" = "1" register "sata_speed" = "SATA_GEN2" end diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb index 15ca3f117d..b308ab2519 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb @@ -69,6 +69,8 @@ chip soc/intel/apollolake device pci 12.0 on # - SATA register "SataPortsEnable[0]" = "1" register "SataPortsEnable[1]" = "1" + register "sata_ports_ssd[0]" = "1" + register "sata_ports_ssd[1]" = "1" register "DisableSataSalpSupport" = "1" register "sata_speed" = "SATA_GEN2" end diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb index 3c907e3c78..1885e817f0 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb @@ -40,6 +40,8 @@ chip soc/intel/apollolake device pci 12.0 on # - SATA register "SataPortsEnable[0]" = "1" register "SataPortsEnable[1]" = "1" + register "sata_ports_ssd[0]" = "1" + register "sata_ports_ssd[1]" = "1" register "DisableSataSalpSupport" = "1" register "sata_speed" = "SATA_GEN2" end -- cgit v1.2.3