From ce011ec1317eebdcec91f29d206869ac0a71c23a Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Tue, 6 Aug 2013 16:00:37 -0700 Subject: exynos5250: Implement support to boot with USB A-A firmware upload This patch implements the basic infrastructure required to use the USB A-A firmware upload feature on Exynos5 processors with Coreboot. It will require a corresponding host-side script that activates the feature and uploads the correct image parts in the correct order to harcoded target addresses, as described in the comments of alternate_cbfs.c. Also fixes a bug in the Google Snow mainboard where it would not correctly initialize the pinmux configuration for the SPI flash bus. During a normal SPI boot the IROM would already do that for you, but when booting from USB you have to do it yourself. Change-Id: I40a39f8f5d1d70b58dbf258015c1653a27097d67 Signed-off-by: Julius Werner Reviewed-on: https://gerrit.chromium.org/gerrit/64875 Reviewed-by: Stefan Reinauer Reviewed-by: Hung-Te Lin Commit-Queue: Gabe Black Reviewed-on: http://review.coreboot.org/4456 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/google/snow/romstage.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index 92fa21e4a1..d45b8613c3 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -180,7 +180,8 @@ void main(void) setup_gpio(); setup_graphics(); - /* Set SPI (primary CBFS media) clock to 50MHz. */ + /* Set SPI (primary CBFS media) clock to 50MHz and configure pinmux. */ + exynos_pinmux_spi1(); clock_set_rate(PERIPH_ID_SPI1, 50000000); cbmem_initialize_empty(); -- cgit v1.2.3