From c994c973c654817f5e764615776b78b84cd21910 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Tue, 14 Mar 2006 19:58:14 +0000 Subject: Fix for nehemiah other fixes for gx2 ram init. support for sharplfg00l04 -- not working yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/amd/rumba/auto.c | 18 ++++++++++++++++++ src/mainboard/lippert/frontrunner/auto.c | 27 ++++++++++++++++++++++++--- src/mainboard/via/epia-m/mainboard.c | 5 +++++ 3 files changed, 47 insertions(+), 3 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/amd/rumba/auto.c b/src/mainboard/amd/rumba/auto.c index 72d1ef4e0e..19f7049c8e 100644 --- a/src/mainboard/amd/rumba/auto.c +++ b/src/mainboard/amd/rumba/auto.c @@ -19,6 +19,24 @@ #include "southbridge/amd/cs5535/cs5535_early_smbus.c" #include "southbridge/amd/cs5535/cs5535_early_setup.c" #include "northbridge/amd/gx2/raminit.h" + +static void sdram_set_spd_registers(const struct mem_controller *ctrl) { + msr_t msr; + /* 1. Initialize GLMC registers base on SPD values, + * Hard coded as XpressROM for now */ + //print_debug("sdram_enable step 1\r\n"); + msr = rdmsr(0x20000018); + msr.hi = 0x10076013; + msr.lo = 0x00003000; + wrmsr(0x20000018, msr); + + msr = rdmsr(0x20000019); + msr.hi = 0x18000108; + msr.lo = 0x696332a3; + wrmsr(0x20000019, msr); + + +} #include "northbridge/amd/gx2/raminit.c" #include "sdram/generic_sdram.c" diff --git a/src/mainboard/lippert/frontrunner/auto.c b/src/mainboard/lippert/frontrunner/auto.c index 72d1ef4e0e..5ad5576291 100644 --- a/src/mainboard/lippert/frontrunner/auto.c +++ b/src/mainboard/lippert/frontrunner/auto.c @@ -19,11 +19,32 @@ #include "southbridge/amd/cs5535/cs5535_early_smbus.c" #include "southbridge/amd/cs5535/cs5535_early_setup.c" #include "northbridge/amd/gx2/raminit.h" + +/* this has to be done on a per-mainboard basis, esp. if you don't have smbus */ +static void sdram_set_spd_registers(const struct mem_controller *ctrl) +{ + msr_t msr; + /* 1. Initialize GLMC registers base on SPD values, + * Hard coded as XpressROM for now */ + //print_debug("sdram_enable step 1\r\n"); + msr = rdmsr(0x20000018); + msr.hi = 0x10076013; + msr.lo = 0x3400; + wrmsr(0x20000018, msr); + + msr = rdmsr(0x20000019); + msr.hi = 0x18000008; + msr.lo = 0x696332a3; + wrmsr(0x20000019, msr); + +} + #include "northbridge/amd/gx2/raminit.c" #include "sdram/generic_sdram.c" #include "northbridge/amd/gx2/pll_reset.c" + static void msr_init(void) { __builtin_wrmsr(0x1808, 0x10f3bf00, 0x22fffc02); @@ -63,15 +84,15 @@ static void main(unsigned long bist) console_init(); cs5535_early_setup(); - + print_err("done cs5535 early\n"); pll_reset(); - + print_err("done pll_reset\n"); /* Halt if there was a built in self test failure */ //report_bist_failure(bist); sdram_initialize(1, memctrl); - + print_err("Done sdram_initialize\n"); /* Check all of memory */ ram_check(0x00000000, 640*1024); diff --git a/src/mainboard/via/epia-m/mainboard.c b/src/mainboard/via/epia-m/mainboard.c index 26e5916f01..da27732d63 100644 --- a/src/mainboard/via/epia-m/mainboard.c +++ b/src/mainboard/via/epia-m/mainboard.c @@ -30,6 +30,11 @@ void write_protect_vgabios(void) device_t dev; printk_info("write_protect_vgabios\n"); + /* there are two possible devices. Just do both. */ + dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3122, 0); + if(dev) + pci_write_config8(dev, 0x61, 0xaa); + dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3123, 0); if(dev) pci_write_config8(dev, 0x61, 0xaa); -- cgit v1.2.3