From b4946a9e654599034adf4075c266bf529b8216a7 Mon Sep 17 00:00:00 2001 From: PH Hsu Date: Tue, 25 Oct 2016 15:03:23 +0800 Subject: google/oak: Add more DRAM modules support Add support for following 3 modules. - Micro MT52L256M32D1PF / MT52L512M32D2PF - Hynix H9CCNNNBJTALAR Hana EVT was planed to add 4 DRAM modules but RAM_CODE=5 is not used in the end. This patch also unifies the naming of the RAM configurations. BUG=chrome-os-partner:58983 TEST=verified on Hana EVT. Change-Id: I7dd44525de8e9dde01f210f4730fa8ccd4baef21 Signed-off-by: Patrick Georgi Original-Commit-Id: 5dccd68149bcfd6fd0a83e310d43063bab645691 Original-Change-Id: I7c245c8c24be159e152f4f3cca25bf970b58425c Original-Signed-off-by: Milton Chiang Original-Signed-off-by: PH Hsu Original-Signed-off-by: Yidi Lin Original-Reviewed-on: https://chromium-review.googlesource.com/402888 Original-Reviewed-by: Pin-Huan Hsu Original-Reviewed-by: Julius Werner Original-Reviewed-by: Paris Yeh Reviewed-on: https://review.coreboot.org/17381 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/google/oak/sdram_configs.c | 32 +++--- .../sdram_inf/sdram-lpddr3-H9CCNNN8GTMLAR-2GB.inc | 116 +++++++++++++++++++++ .../sdram_inf/sdram-lpddr3-H9CCNNNBJTALAR-4GB.inc | 116 +++++++++++++++++++++ .../sdram_inf/sdram-lpddr3-H9CCNNNBLTBLAR-4GB.inc | 116 +++++++++++++++++++++ .../oak/sdram_inf/sdram-lpddr3-K4E8E304EE-2GB.inc | 116 +++++++++++++++++++++ .../sdram_inf/sdram-lpddr3-MT52L256M32D1PF-2GB.inc | 1 + .../sdram_inf/sdram-lpddr3-MT52L512M32D2PF-4GB.inc | 1 + .../oak/sdram_inf/sdram-lpddr3-hynix-2GB.inc | 116 --------------------- .../oak/sdram_inf/sdram-lpddr3-hynix-4GB.inc | 116 --------------------- .../oak/sdram_inf/sdram-lpddr3-samsung-2GB.inc | 116 --------------------- 10 files changed, 482 insertions(+), 364 deletions(-) create mode 100644 src/mainboard/google/oak/sdram_inf/sdram-lpddr3-H9CCNNN8GTMLAR-2GB.inc create mode 100644 src/mainboard/google/oak/sdram_inf/sdram-lpddr3-H9CCNNNBJTALAR-4GB.inc create mode 100644 src/mainboard/google/oak/sdram_inf/sdram-lpddr3-H9CCNNNBLTBLAR-4GB.inc create mode 100644 src/mainboard/google/oak/sdram_inf/sdram-lpddr3-K4E8E304EE-2GB.inc create mode 120000 src/mainboard/google/oak/sdram_inf/sdram-lpddr3-MT52L256M32D1PF-2GB.inc create mode 120000 src/mainboard/google/oak/sdram_inf/sdram-lpddr3-MT52L512M32D2PF-4GB.inc delete mode 100644 src/mainboard/google/oak/sdram_inf/sdram-lpddr3-hynix-2GB.inc delete mode 100644 src/mainboard/google/oak/sdram_inf/sdram-lpddr3-hynix-4GB.inc delete mode 100644 src/mainboard/google/oak/sdram_inf/sdram-lpddr3-samsung-2GB.inc (limited to 'src/mainboard') diff --git a/src/mainboard/google/oak/sdram_configs.c b/src/mainboard/google/oak/sdram_configs.c index b2d8a444f8..5ef6fed76f 100644 --- a/src/mainboard/google/oak/sdram_configs.c +++ b/src/mainboard/google/oak/sdram_configs.c @@ -19,22 +19,22 @@ #include static const struct mt8173_sdram_params sdram_configs[] = { -#include "sdram_inf/sdram-lpddr3-hynix-2GB.inc" /* ram_code = 0000 */ -#include "sdram_inf/sdram-lpddr3-samsung-2GB.inc" /* ram_code = 0001 */ -#include "sdram_inf/sdram-lpddr3-K4E6E304EE-4GB.inc" /* ram_code = 0010 */ -#include "sdram_inf/sdram-lpddr3-hynix-4GB.inc" /* ram_code = 0011 */ -#include "sdram_inf/sdram-lpddr3-K4E6E304EB-4GB.inc" /* ram_code = 0100 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 0101 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 0110 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 0111 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1000 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1001 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1010 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1011 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1100 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1101 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1110 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1111 */ +#include "sdram_inf/sdram-lpddr3-H9CCNNN8GTMLAR-2GB.inc" /* ram_code = 0000 */ +#include "sdram_inf/sdram-lpddr3-K4E8E304EE-2GB.inc" /* ram_code = 0001 */ +#include "sdram_inf/sdram-lpddr3-K4E6E304EE-4GB.inc" /* ram_code = 0010 */ +#include "sdram_inf/sdram-lpddr3-H9CCNNNBLTBLAR-4GB.inc" /* ram_code = 0011 */ +#include "sdram_inf/sdram-lpddr3-K4E6E304EB-4GB.inc" /* ram_code = 0100 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 0101 */ +#include "sdram_inf/sdram-lpddr3-MT52L512M32D2PF-4GB.inc" /* ram_code = 0110 */ +#include "sdram_inf/sdram-lpddr3-H9CCNNNBJTALAR-4GB.inc" /* ram_code = 0111 */ +#include "sdram_inf/sdram-lpddr3-MT52L256M32D1PF-2GB.inc" /* ram_code = 1000 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 1001 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 1010 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 1011 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 1100 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 1101 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 1110 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 1111 */ }; const struct mt8173_sdram_params *get_sdram_config(void) diff --git a/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-H9CCNNN8GTMLAR-2GB.inc b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-H9CCNNN8GTMLAR-2GB.inc new file mode 100644 index 0000000000..578343b7c0 --- /dev/null +++ b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-H9CCNNN8GTMLAR-2GB.inc @@ -0,0 +1,116 @@ +{ /* 2GB (8Gb + 8Gb) for single rank dram setting */ + { + .impedance_drvp = 0x9, + .impedance_drvn = 0xa, + .datlat_ucfirst = 19, + + .ca_train = { + [CHANNEL_A] = { 7, 7, 5, 6, 2, 1, 0, 1, 0, 2}, + [CHANNEL_B] = { 1, 2, 2, 0, 2, 3, 3, 3, 3, 3} + }, + + .ca_train_center = { + [CHANNEL_A] = 2, + [CHANNEL_B] = 0 + }, + + .wr_level = { + [CHANNEL_A] = { 5, 6, 5, 6}, + [CHANNEL_B] = { 6, 6, 6, 4} + }, + + .gating_win = { + [CHANNEL_A] = { + { 28, 64}, + { 0, 0} + }, + [CHANNEL_B] = { + { 28, 64}, + { 0, 0} + } + }, + + .rx_dqs_dly = { + [CHANNEL_A] = 0x110e0b0b, + [CHANNEL_B] = 0x12100d0d + }, + + .rx_dq_dly = { + [CHANNEL_A] = { + 0x01040302, + 0x04010300, + 0x02040300, + 0x04030302, + 0x04070400, + 0x07070707, + 0x05070808, + 0x00010404 + }, + [CHANNEL_B] = { + 0x05060604, + 0x04010400, + 0x05070300, + 0x05030504, + 0x07090500, + 0x08090707, + 0x080a0a0a, + 0x02000604 + } + }, + }, + { + .actim = 0xaafd478c, + .actim1 = 0x91001f59, + .actim05t = 0x000025e1, + .conf1 = 0x00048403, + .conf2 = 0x030000a9, + .ddr2ctl = 0x000063b1, + .gddr3ctl1 = 0x11000000, + .misctl0 = 0x21000000, + .pd_ctrl = 0xd1976442, + .rkcfg = 0x002156c0, + .test2_3 = 0xbfc70401, + .test2_4 = 0x2801110d + }, + { + .cona = 0x20102017, + .conb = 0x17283544, + .conc = 0x0a1a0b1a, + .cond = 0x00000000, + .cone = 0xffff0848, + .conf = 0x08420000, + .cong = 0x2b2b2a38, + .conh = 0x00000000, + .conm_1 = 0x40000500, + .conm_2 = 0x400005ff, + .mdct_1 = 0x80030303, + .mdct_2 = 0x34220c3f, + .test0 = 0xcccccccc, + .test1 = 0xcccccccc, + .testb = 0x00060124, + .testc = 0x38470000, + .testd = 0x00000000, + .arba = 0x7f077a49, + .arbc = 0xa0a070dd, + .arbd = 0x07007046, + .arbe = 0x40407046, + .arbf = 0xa0a070c6, + .arbg = 0xffff7047, + .arbi = 0x20406188, + .arbj = 0x9719595e, + .arbk = 0x64f3fc79, + .slct_1 = 0x00010800, + .slct_2 = 0xff03ff00, + .bmen = 0x00ff0001 + }, + { + .mrs_1 = 0x00830001, + .mrs_2 = 0x001c0002, + .mrs_3 = 0x00010003, + .mrs_10 = 0x00ff000a, + .mrs_11 = 0x0000000b, + .mrs_63 = 0x0000003f + }, + .type = TYPE_LPDDR3, + .dram_freq = 896 * MHz, +}, diff --git a/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-H9CCNNNBJTALAR-4GB.inc b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-H9CCNNNBJTALAR-4GB.inc new file mode 100644 index 0000000000..c7a18b4b3e --- /dev/null +++ b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-H9CCNNNBJTALAR-4GB.inc @@ -0,0 +1,116 @@ +{ /* 2GB (8Gb + 8Gb) for single rank dram setting */ + { + .impedance_drvp = 0x9, + .impedance_drvn = 0xa, + .datlat_ucfirst = 19, + + .ca_train = { + [CHANNEL_A] = { 7, 7, 5, 6, 2, 1, 0, 1, 0, 2}, + [CHANNEL_B] = { 1, 2, 2, 0, 2, 3, 3, 3, 3, 3} + }, + + .ca_train_center = { + [CHANNEL_A] = 2, + [CHANNEL_B] = 0 + }, + + .wr_level = { + [CHANNEL_A] = { 5, 6, 5, 6}, + [CHANNEL_B] = { 6, 6, 6, 4} + }, + + .gating_win = { + [CHANNEL_A] = { + { 28, 64}, + { 28, 64} + }, + [CHANNEL_B] = { + { 28, 64}, + { 28, 64} + } + }, + + .rx_dqs_dly = { + [CHANNEL_A] = 0x110e0b0b, + [CHANNEL_B] = 0x0D100d0d + }, + + .rx_dq_dly = { + [CHANNEL_A] = { + 0x01040302, + 0x04010300, + 0x02040300, + 0x04030302, + 0x04070400, + 0x07070707, + 0x05070808, + 0x00010404 + }, + [CHANNEL_B] = { + 0x05060604, + 0x04010400, + 0x05070300, + 0x05030504, + 0x07090500, + 0x08090707, + 0x080a0a0a, + 0x02000604 + } + }, + }, + { + .actim = 0xaafd478c, + .actim1 = 0x91001f59, + .actim05t = 0x000025e1, + .conf1 = 0x00048403, + .conf2 = 0x030000a9, + .ddr2ctl = 0x000063b1, + .gddr3ctl1 = 0x11000000, + .misctl0 = 0x21000000, + .pd_ctrl = 0xd1976442, + .rkcfg = 0x002156c1, + .test2_3 = 0xbfc70401, + .test2_4 = 0x2801110d + }, + { + .cona = 0xa053a057, + .conb = 0x17283544, + .conc = 0x0a1a0b1a, + .cond = 0x00000000, + .cone = 0xffff0848, + .conf = 0x08420000, + .cong = 0x2b2b2a38, + .conh = 0x00000000, + .conm_1 = 0x40000500, + .conm_2 = 0x400005ff, + .mdct_1 = 0x80030303, + .mdct_2 = 0x34220c3f, + .test0 = 0xcccccccc, + .test1 = 0xcccccccc, + .testb = 0x00060124, + .testc = 0x38470000, + .testd = 0x00000000, + .arba = 0x7f077a49, + .arbc = 0xa0a070dd, + .arbd = 0x07007046, + .arbe = 0x40407046, + .arbf = 0xa0a070c6, + .arbg = 0xffff7047, + .arbi = 0x20406188, + .arbj = 0x9719595e, + .arbk = 0x64f3fc79, + .slct_1 = 0x00010800, + .slct_2 = 0xff03ff00, + .bmen = 0x00ff0001 + }, + { + .mrs_1 = 0x00830001, + .mrs_2 = 0x001c0002, + .mrs_3 = 0x00010003, + .mrs_10 = 0x00ff000a, + .mrs_11 = 0x0000000b, + .mrs_63 = 0x0000003f + }, + .type = TYPE_LPDDR3, + .dram_freq = 896 * MHz, +}, diff --git a/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-H9CCNNNBLTBLAR-4GB.inc b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-H9CCNNNBLTBLAR-4GB.inc new file mode 100644 index 0000000000..6e3b203fed --- /dev/null +++ b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-H9CCNNNBLTBLAR-4GB.inc @@ -0,0 +1,116 @@ +{ /* 2GB (8Gb + 8Gb) for single rank dram setting */ + { + .impedance_drvp = 0xc, + .impedance_drvn = 0xd, + .datlat_ucfirst = 19, + + .ca_train = { + [CHANNEL_A] = { 7, 7, 5, 6, 2, 1, 0, 1, 0, 2}, + [CHANNEL_B] = { 1, 2, 2, 0, 2, 3, 3, 3, 3, 3} + }, + + .ca_train_center = { + [CHANNEL_A] = 2, + [CHANNEL_B] = 0 + }, + + .wr_level = { + [CHANNEL_A] = { 5, 6, 5, 6}, + [CHANNEL_B] = { 6, 6, 6, 4} + }, + + .gating_win = { + [CHANNEL_A] = { + { 28, 64}, + { 28, 64} + }, + [CHANNEL_B] = { + { 28, 64}, + { 28, 64} + } + }, + + .rx_dqs_dly = { + [CHANNEL_A] = 0x110e0b0b, + [CHANNEL_B] = 0x0D100d0d + }, + + .rx_dq_dly = { + [CHANNEL_A] = { + 0x01040302, + 0x04010300, + 0x02040300, + 0x04030302, + 0x04070400, + 0x07070707, + 0x05070808, + 0x00010404 + }, + [CHANNEL_B] = { + 0x05060604, + 0x04010400, + 0x05070300, + 0x05030504, + 0x07090500, + 0x08090707, + 0x080a0a0a, + 0x02000604 + } + }, + }, + { + .actim = 0xaafd478c, + .actim1 = 0x91001f59, + .actim05t = 0x000025e1, + .conf1 = 0x00048403, + .conf2 = 0x030000a9, + .ddr2ctl = 0x000063b1, + .gddr3ctl1 = 0x11000000, + .misctl0 = 0x21000000, + .pd_ctrl = 0xd1976442, + .rkcfg = 0x002156c1, + .test2_3 = 0xbfc70401, + .test2_4 = 0x2801110d + }, + { + .cona = 0x50a350a7, + .conb = 0x17283544, + .conc = 0x0a1a0b1a, + .cond = 0x00000000, + .cone = 0xffff0848, + .conf = 0x08420000, + .cong = 0x2b2b2a38, + .conh = 0x00000000, + .conm_1 = 0x40000500, + .conm_2 = 0x400005ff, + .mdct_1 = 0x80030303, + .mdct_2 = 0x34220c3f, + .test0 = 0xcccccccc, + .test1 = 0xcccccccc, + .testb = 0x00060124, + .testc = 0x38470000, + .testd = 0x00000000, + .arba = 0x7f077a49, + .arbc = 0xa0a070dd, + .arbd = 0x07007046, + .arbe = 0x40407046, + .arbf = 0xa0a070c6, + .arbg = 0xffff7047, + .arbi = 0x20406188, + .arbj = 0x9719595e, + .arbk = 0x64f3fc79, + .slct_1 = 0x00010800, + .slct_2 = 0xff03ff00, + .bmen = 0x00ff0001 + }, + { + .mrs_1 = 0x00830001, + .mrs_2 = 0x001c0002, + .mrs_3 = 0x00010003, + .mrs_10 = 0x00ff000a, + .mrs_11 = 0x0000000b, + .mrs_63 = 0x0000003f + }, + .type = TYPE_LPDDR3, + .dram_freq = 896 * MHz, +}, diff --git a/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-K4E8E304EE-2GB.inc b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-K4E8E304EE-2GB.inc new file mode 100644 index 0000000000..4c58286803 --- /dev/null +++ b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-K4E8E304EE-2GB.inc @@ -0,0 +1,116 @@ +{ /* 2GB (8Gb + 8Gb) for dual rank dram setting */ + { + .impedance_drvp = 0x9, + .impedance_drvn = 0xa, + .datlat_ucfirst = 18, + + .ca_train = { + [CHANNEL_A] = { 6, 4, 3, 5, 4, 0, 0, 0, 0, 0}, + [CHANNEL_B] = { 1, 1, 1, 1, 0, 6, 5, 5, 5, 7} + }, + + .ca_train_center = { + [CHANNEL_A] = 3, + [CHANNEL_B] = 3 + }, + + .wr_level = { + [CHANNEL_A] = { 8, 10, 6, 8}, + [CHANNEL_B] = { 9, 9, 7, 6} + }, + + .gating_win = { + [CHANNEL_A] = { + { 27, 64}, + { 27, 72} + }, + [CHANNEL_B] = { + { 27, 72}, + { 27, 72} + } + }, + + .rx_dqs_dly = { + [CHANNEL_A] = 0x08080908, + [CHANNEL_B] = 0x0b0b060b + }, + + .rx_dq_dly = { + [CHANNEL_A] = { + 0x01010300, + 0x06030002, + 0x01010201, + 0x03020002, + 0x00010103, + 0x02010201, + 0x02040200, + 0x02020201 + }, + [CHANNEL_B] = { + 0x00020202, + 0x02020202, + 0x01020201, + 0x01010100, + 0x01010101, + 0x01000002, + 0x02000201, + 0x00010101, + } + }, + }, + { + .actim = 0xaafd478c, + .actim1 = 0x91001f59, + .actim05t = 0x000025e1, + .conf1 = 0x00048403, + .conf2 = 0x030000a9, + .ddr2ctl = 0x000063b1, + .gddr3ctl1 = 0x11000000, + .misctl0 = 0x21000000, + .pd_ctrl = 0xd1976442, + .rkcfg = 0x002156c1, + .test2_3 = 0xbfc70401, + .test2_4 = 0x2801110d + }, + { + .cona = 0x50535057, + .conb = 0x17283544, + .conc = 0x0a1a0b1a, + .cond = 0x00000000, + .cone = 0xffff0848, + .conf = 0x08420000, + .cong = 0x2b2b2a38, + .conh = 0x00000000, + .conm_1 = 0x40000500, + .conm_2 = 0x400005ff, + .mdct_1 = 0x80030303, + .mdct_2 = 0x34220c3f, + .test0 = 0xcccccccc, + .test1 = 0xcccccccc, + .testb = 0x00060124, + .testc = 0x38470000, + .testd = 0x00000000, + .arba = 0x7f077a49, + .arbc = 0xa0a070dd, + .arbd = 0x07007046, + .arbe = 0x40407046, + .arbf = 0xa0a070c6, + .arbg = 0xffff7047, + .arbi = 0x20406188, + .arbj = 0x9719595e, + .arbk = 0x64f3fc79, + .slct_1 = 0x00010800, + .slct_2 = 0xff03ff00, + .bmen = 0x00ff0001 + }, + { + .mrs_1 = 0x00830001, + .mrs_2 = 0x001c0002, + .mrs_3 = 0x00010003, + .mrs_10 = 0x00ff000a, + .mrs_11 = 0x0000000b, + .mrs_63 = 0x0000003f + }, + .type = TYPE_LPDDR3, + .dram_freq = 896 * MHz, +}, diff --git a/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-MT52L256M32D1PF-2GB.inc b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-MT52L256M32D1PF-2GB.inc new file mode 120000 index 0000000000..1ba33c73a7 --- /dev/null +++ b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-MT52L256M32D1PF-2GB.inc @@ -0,0 +1 @@ +sdram-lpddr3-H9CCNNN8GTMLAR-2GB.inc \ No newline at end of file diff --git a/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-MT52L512M32D2PF-4GB.inc b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-MT52L512M32D2PF-4GB.inc new file mode 120000 index 0000000000..564af33992 --- /dev/null +++ b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-MT52L512M32D2PF-4GB.inc @@ -0,0 +1 @@ +sdram-lpddr3-K4E6E304EB-4GB.inc \ No newline at end of file diff --git a/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-hynix-2GB.inc b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-hynix-2GB.inc deleted file mode 100644 index 578343b7c0..0000000000 --- a/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-hynix-2GB.inc +++ /dev/null @@ -1,116 +0,0 @@ -{ /* 2GB (8Gb + 8Gb) for single rank dram setting */ - { - .impedance_drvp = 0x9, - .impedance_drvn = 0xa, - .datlat_ucfirst = 19, - - .ca_train = { - [CHANNEL_A] = { 7, 7, 5, 6, 2, 1, 0, 1, 0, 2}, - [CHANNEL_B] = { 1, 2, 2, 0, 2, 3, 3, 3, 3, 3} - }, - - .ca_train_center = { - [CHANNEL_A] = 2, - [CHANNEL_B] = 0 - }, - - .wr_level = { - [CHANNEL_A] = { 5, 6, 5, 6}, - [CHANNEL_B] = { 6, 6, 6, 4} - }, - - .gating_win = { - [CHANNEL_A] = { - { 28, 64}, - { 0, 0} - }, - [CHANNEL_B] = { - { 28, 64}, - { 0, 0} - } - }, - - .rx_dqs_dly = { - [CHANNEL_A] = 0x110e0b0b, - [CHANNEL_B] = 0x12100d0d - }, - - .rx_dq_dly = { - [CHANNEL_A] = { - 0x01040302, - 0x04010300, - 0x02040300, - 0x04030302, - 0x04070400, - 0x07070707, - 0x05070808, - 0x00010404 - }, - [CHANNEL_B] = { - 0x05060604, - 0x04010400, - 0x05070300, - 0x05030504, - 0x07090500, - 0x08090707, - 0x080a0a0a, - 0x02000604 - } - }, - }, - { - .actim = 0xaafd478c, - .actim1 = 0x91001f59, - .actim05t = 0x000025e1, - .conf1 = 0x00048403, - .conf2 = 0x030000a9, - .ddr2ctl = 0x000063b1, - .gddr3ctl1 = 0x11000000, - .misctl0 = 0x21000000, - .pd_ctrl = 0xd1976442, - .rkcfg = 0x002156c0, - .test2_3 = 0xbfc70401, - .test2_4 = 0x2801110d - }, - { - .cona = 0x20102017, - .conb = 0x17283544, - .conc = 0x0a1a0b1a, - .cond = 0x00000000, - .cone = 0xffff0848, - .conf = 0x08420000, - .cong = 0x2b2b2a38, - .conh = 0x00000000, - .conm_1 = 0x40000500, - .conm_2 = 0x400005ff, - .mdct_1 = 0x80030303, - .mdct_2 = 0x34220c3f, - .test0 = 0xcccccccc, - .test1 = 0xcccccccc, - .testb = 0x00060124, - .testc = 0x38470000, - .testd = 0x00000000, - .arba = 0x7f077a49, - .arbc = 0xa0a070dd, - .arbd = 0x07007046, - .arbe = 0x40407046, - .arbf = 0xa0a070c6, - .arbg = 0xffff7047, - .arbi = 0x20406188, - .arbj = 0x9719595e, - .arbk = 0x64f3fc79, - .slct_1 = 0x00010800, - .slct_2 = 0xff03ff00, - .bmen = 0x00ff0001 - }, - { - .mrs_1 = 0x00830001, - .mrs_2 = 0x001c0002, - .mrs_3 = 0x00010003, - .mrs_10 = 0x00ff000a, - .mrs_11 = 0x0000000b, - .mrs_63 = 0x0000003f - }, - .type = TYPE_LPDDR3, - .dram_freq = 896 * MHz, -}, diff --git a/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-hynix-4GB.inc b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-hynix-4GB.inc deleted file mode 100644 index 6e3b203fed..0000000000 --- a/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-hynix-4GB.inc +++ /dev/null @@ -1,116 +0,0 @@ -{ /* 2GB (8Gb + 8Gb) for single rank dram setting */ - { - .impedance_drvp = 0xc, - .impedance_drvn = 0xd, - .datlat_ucfirst = 19, - - .ca_train = { - [CHANNEL_A] = { 7, 7, 5, 6, 2, 1, 0, 1, 0, 2}, - [CHANNEL_B] = { 1, 2, 2, 0, 2, 3, 3, 3, 3, 3} - }, - - .ca_train_center = { - [CHANNEL_A] = 2, - [CHANNEL_B] = 0 - }, - - .wr_level = { - [CHANNEL_A] = { 5, 6, 5, 6}, - [CHANNEL_B] = { 6, 6, 6, 4} - }, - - .gating_win = { - [CHANNEL_A] = { - { 28, 64}, - { 28, 64} - }, - [CHANNEL_B] = { - { 28, 64}, - { 28, 64} - } - }, - - .rx_dqs_dly = { - [CHANNEL_A] = 0x110e0b0b, - [CHANNEL_B] = 0x0D100d0d - }, - - .rx_dq_dly = { - [CHANNEL_A] = { - 0x01040302, - 0x04010300, - 0x02040300, - 0x04030302, - 0x04070400, - 0x07070707, - 0x05070808, - 0x00010404 - }, - [CHANNEL_B] = { - 0x05060604, - 0x04010400, - 0x05070300, - 0x05030504, - 0x07090500, - 0x08090707, - 0x080a0a0a, - 0x02000604 - } - }, - }, - { - .actim = 0xaafd478c, - .actim1 = 0x91001f59, - .actim05t = 0x000025e1, - .conf1 = 0x00048403, - .conf2 = 0x030000a9, - .ddr2ctl = 0x000063b1, - .gddr3ctl1 = 0x11000000, - .misctl0 = 0x21000000, - .pd_ctrl = 0xd1976442, - .rkcfg = 0x002156c1, - .test2_3 = 0xbfc70401, - .test2_4 = 0x2801110d - }, - { - .cona = 0x50a350a7, - .conb = 0x17283544, - .conc = 0x0a1a0b1a, - .cond = 0x00000000, - .cone = 0xffff0848, - .conf = 0x08420000, - .cong = 0x2b2b2a38, - .conh = 0x00000000, - .conm_1 = 0x40000500, - .conm_2 = 0x400005ff, - .mdct_1 = 0x80030303, - .mdct_2 = 0x34220c3f, - .test0 = 0xcccccccc, - .test1 = 0xcccccccc, - .testb = 0x00060124, - .testc = 0x38470000, - .testd = 0x00000000, - .arba = 0x7f077a49, - .arbc = 0xa0a070dd, - .arbd = 0x07007046, - .arbe = 0x40407046, - .arbf = 0xa0a070c6, - .arbg = 0xffff7047, - .arbi = 0x20406188, - .arbj = 0x9719595e, - .arbk = 0x64f3fc79, - .slct_1 = 0x00010800, - .slct_2 = 0xff03ff00, - .bmen = 0x00ff0001 - }, - { - .mrs_1 = 0x00830001, - .mrs_2 = 0x001c0002, - .mrs_3 = 0x00010003, - .mrs_10 = 0x00ff000a, - .mrs_11 = 0x0000000b, - .mrs_63 = 0x0000003f - }, - .type = TYPE_LPDDR3, - .dram_freq = 896 * MHz, -}, diff --git a/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-samsung-2GB.inc b/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-samsung-2GB.inc deleted file mode 100644 index 4c58286803..0000000000 --- a/src/mainboard/google/oak/sdram_inf/sdram-lpddr3-samsung-2GB.inc +++ /dev/null @@ -1,116 +0,0 @@ -{ /* 2GB (8Gb + 8Gb) for dual rank dram setting */ - { - .impedance_drvp = 0x9, - .impedance_drvn = 0xa, - .datlat_ucfirst = 18, - - .ca_train = { - [CHANNEL_A] = { 6, 4, 3, 5, 4, 0, 0, 0, 0, 0}, - [CHANNEL_B] = { 1, 1, 1, 1, 0, 6, 5, 5, 5, 7} - }, - - .ca_train_center = { - [CHANNEL_A] = 3, - [CHANNEL_B] = 3 - }, - - .wr_level = { - [CHANNEL_A] = { 8, 10, 6, 8}, - [CHANNEL_B] = { 9, 9, 7, 6} - }, - - .gating_win = { - [CHANNEL_A] = { - { 27, 64}, - { 27, 72} - }, - [CHANNEL_B] = { - { 27, 72}, - { 27, 72} - } - }, - - .rx_dqs_dly = { - [CHANNEL_A] = 0x08080908, - [CHANNEL_B] = 0x0b0b060b - }, - - .rx_dq_dly = { - [CHANNEL_A] = { - 0x01010300, - 0x06030002, - 0x01010201, - 0x03020002, - 0x00010103, - 0x02010201, - 0x02040200, - 0x02020201 - }, - [CHANNEL_B] = { - 0x00020202, - 0x02020202, - 0x01020201, - 0x01010100, - 0x01010101, - 0x01000002, - 0x02000201, - 0x00010101, - } - }, - }, - { - .actim = 0xaafd478c, - .actim1 = 0x91001f59, - .actim05t = 0x000025e1, - .conf1 = 0x00048403, - .conf2 = 0x030000a9, - .ddr2ctl = 0x000063b1, - .gddr3ctl1 = 0x11000000, - .misctl0 = 0x21000000, - .pd_ctrl = 0xd1976442, - .rkcfg = 0x002156c1, - .test2_3 = 0xbfc70401, - .test2_4 = 0x2801110d - }, - { - .cona = 0x50535057, - .conb = 0x17283544, - .conc = 0x0a1a0b1a, - .cond = 0x00000000, - .cone = 0xffff0848, - .conf = 0x08420000, - .cong = 0x2b2b2a38, - .conh = 0x00000000, - .conm_1 = 0x40000500, - .conm_2 = 0x400005ff, - .mdct_1 = 0x80030303, - .mdct_2 = 0x34220c3f, - .test0 = 0xcccccccc, - .test1 = 0xcccccccc, - .testb = 0x00060124, - .testc = 0x38470000, - .testd = 0x00000000, - .arba = 0x7f077a49, - .arbc = 0xa0a070dd, - .arbd = 0x07007046, - .arbe = 0x40407046, - .arbf = 0xa0a070c6, - .arbg = 0xffff7047, - .arbi = 0x20406188, - .arbj = 0x9719595e, - .arbk = 0x64f3fc79, - .slct_1 = 0x00010800, - .slct_2 = 0xff03ff00, - .bmen = 0x00ff0001 - }, - { - .mrs_1 = 0x00830001, - .mrs_2 = 0x001c0002, - .mrs_3 = 0x00010003, - .mrs_10 = 0x00ff000a, - .mrs_11 = 0x0000000b, - .mrs_63 = 0x0000003f - }, - .type = TYPE_LPDDR3, - .dram_freq = 896 * MHz, -}, -- cgit v1.2.3