From b202a01acd9617a37ed465a9b759128683d1fdf0 Mon Sep 17 00:00:00 2001 From: Bora Guvendik Date: Wed, 1 Nov 2017 12:47:55 -0700 Subject: intel/cannonlake_rvp: enable CNVi bluetooth Enable USB2 port 10 for CNVi bluetooth. TEST=Boot to OS, verify bluetooth functionality. Change-Id: I5f2390c149bf0de911efac09f54ccd641f51bbcd Signed-off-by: Bora Guvendik Reviewed-on: https://review.coreboot.org/22290 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Paul Menzel Reviewed-by: Pratikkumar V Prajapati --- src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard') diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb index 80b4c43943..ca46d36f32 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb @@ -21,7 +21,7 @@ chip soc/intel/cannonlake register "usb2_ports[6]" = "USB2_PORT_EMPTY" register "usb2_ports[7]" = "USB2_PORT_EMPTY" register "usb2_ports[8]" = "USB2_PORT_EMPTY" - register "usb2_ports[9]" = "USB2_PORT_EMPTY" + register "usb2_ports[9]" = "USB2_PORT_MID(OC0)" register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC0)" -- cgit v1.2.3