From ac35e622c2974304b538292088f5110c181085f5 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Tue, 7 Nov 2017 13:43:02 -0700 Subject: mainboard/google/kahlee: Add baseboard framework BUG=b:68293392 TEST=Build only Change-Id: Ie4d039b4da10a992fc9dd2b0221fd4a1644aae6a Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/22373 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- .../google/kahlee/variants/baseboard/Makefile.inc | 22 ++++++++++++ .../google/kahlee/variants/baseboard/gpio.c | 40 ++++++++++++++++++++++ .../baseboard/include/baseboard/acpi/usb_oc.asl | 29 ++++++++++++++++ .../google/kahlee/variants/baseboard/memory.c | 30 ++++++++++++++++ 4 files changed, 121 insertions(+) create mode 100644 src/mainboard/google/kahlee/variants/baseboard/Makefile.inc create mode 100644 src/mainboard/google/kahlee/variants/baseboard/gpio.c create mode 100644 src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/usb_oc.asl create mode 100644 src/mainboard/google/kahlee/variants/baseboard/memory.c (limited to 'src/mainboard') diff --git a/src/mainboard/google/kahlee/variants/baseboard/Makefile.inc b/src/mainboard/google/kahlee/variants/baseboard/Makefile.inc new file mode 100644 index 0000000000..94f388912c --- /dev/null +++ b/src/mainboard/google/kahlee/variants/baseboard/Makefile.inc @@ -0,0 +1,22 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2017 Google, Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +bootblock-y += gpio.c + +romstage-y += gpio.c +romstage-y += memory.c + +ramstage-y += gpio.c +ramstage-y += memory.c diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c new file mode 100644 index 0000000000..175a321ec5 --- /dev/null +++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c @@ -0,0 +1,40 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +const GPIO_CONTROL __attribute__((weak)) agesa_board_gpios[] = { + +}; + +/* + * GPE setup table must match ACPI GPE ASL + * { gevent, gpe, direction, level } + */ +static const struct sci_source gpe_table[] = { + + +}; + +const __attribute__((weak)) struct sci_source *get_gpe_table(size_t *num) +{ + *num = ARRAY_SIZE(gpe_table); + return gpe_table; +} diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/usb_oc.asl b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/usb_oc.asl new file mode 100644 index 0000000000..72f26d8407 --- /dev/null +++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/usb_oc.asl @@ -0,0 +1,29 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Advanced Micro Devices, Inc. + * Copyright (C) 2013 Sage Electronic Engineering, LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* USB overcurrent mapping pins. */ +Name (UOM0, 0) +Name (UOM1, 0) +Name (UOM2, 0) +Name (UOM3, 0) +Name (UOM4, 0) +Name (UOM5, 0) +Name (UOM6, 0) +Name (UOM7, 0) +Name (UOM8, 0) +Name (UOM9, 0) + +/* USB Overcurrent GPEs */ diff --git a/src/mainboard/google/kahlee/variants/baseboard/memory.c b/src/mainboard/google/kahlee/variants/baseboard/memory.c new file mode 100644 index 0000000000..511241f603 --- /dev/null +++ b/src/mainboard/google/kahlee/variants/baseboard/memory.c @@ -0,0 +1,30 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2017 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include /* src/include/gpio.h */ +#include +#include + +size_t __attribute__((weak)) variant_board_id(void) +{ + gpio_t pads[] = { + [3] = MEM_CONFIG3, + [2] = MEM_CONFIG2, + [1] = MEM_CONFIG1, + [0] = MEM_CONFIG0, + }; + + return gpio_pullup_base2_value(pads, ARRAY_SIZE(pads)); +} -- cgit v1.2.3