From a03fc30baae3ec37f2ce7c0f34cb8e083b19200d Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Sat, 15 Jun 2024 10:45:10 +0200 Subject: mb/hp/snb_ivb_laptops/8560w: Move genx_dec settings into LPC scope Change-Id: I3cb0a39c83d6c92d604f1190538db88d97a81693 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/83091 Tested-by: build bot (Jenkins) Reviewed-by: Nicholas Chin --- src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb index 8c2f3f9c25..6a1cd14bf3 100644 --- a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb +++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb @@ -9,10 +9,6 @@ chip northbridge/intel/sandybridge chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH register "docking_supported" = "0" - register "gen1_dec" = "0x007c0201" - register "gen2_dec" = "0x000c0101" - register "gen3_dec" = "0x00fcfe01" - register "gen4_dec" = "0x000402e9" register "gpi6_routing" = "2" register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }" # HDD(0), ODD(1), eSATA(4) @@ -44,6 +40,10 @@ chip northbridge/intel/sandybridge device ref pcie_rp7 off end device ref pcie_rp8 on end # NEC USB 3.0 Host Controller device ref lpc on + register "gen1_dec" = "0x007c0201" + register "gen2_dec" = "0x000c0101" + register "gen3_dec" = "0x00fcfe01" + register "gen4_dec" = "0x000402e9" chip ec/hp/kbc1126 register "ec_data_port" = "0x60" register "ec_cmd_port" = "0x64" -- cgit v1.2.3