From 9e180387bdaf4ad6e29cd2b7044bccfb1b1e6f67 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Thu, 18 Nov 2010 10:48:15 +0000 Subject: Move register block definitions out of board code into chipset code (where it belongs) Signed-off-by: Patrick Georgi Acked-by: Patrick Georgi git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6088 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/intel/eagleheights/romstage.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c index 774f88f60f..07ba0a0bdf 100644 --- a/src/mainboard/intel/eagleheights/romstage.c +++ b/src/mainboard/intel/eagleheights/romstage.c @@ -41,16 +41,11 @@ #include "superio/intel/i3100/i3100_early_serial.c" #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c" #include "northbridge/intel/i3100/i3100.h" +#include "southbridge/intel/i3100/i3100.h" #define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D3F0) #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) -/* SATA */ -#define SATA_MAP 0x90 - -#define SATA_MODE_IDE 0x00 -#define SATA_MODE_AHCI 0x01 - #define RCBA_RPC 0x0224 /* 32 bit */ #define RCBA_TCTL 0x3000 /* 8 bit */ -- cgit v1.2.3