From 934f683078f736e5409fcef749bf6f27774252c0 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 15 Jun 2020 23:49:52 +0200 Subject: mb/asrock/b85m_pro4: Correct GP01 output level This allows the CPU fan tach signal to reach the Super I/O. Change-Id: Ibf73d7c7c1951b75ee4e0c731caf951f2c6bfcae Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/42402 Reviewed-by: Felix Held Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- src/mainboard/asrock/b85m_pro4/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard') diff --git a/src/mainboard/asrock/b85m_pro4/devicetree.cb b/src/mainboard/asrock/b85m_pro4/devicetree.cb index cb7df0a147..a5c275d427 100644 --- a/src/mainboard/asrock/b85m_pro4/devicetree.cb +++ b/src/mainboard/asrock/b85m_pro4/devicetree.cb @@ -79,7 +79,7 @@ chip northbridge/intel/haswell device pnp 2e.8 off end # WDT device pnp 2e.108 on # GPIO0 irq 0xe0 = 0xf9 # + GPIO0 direction - irq 0xe1 = 0xfb # + GPIO0 value + irq 0xe1 = 0xfd # + GPIO0 value end device pnp 2e.208 off end # GPIOA device pnp 2e.308 off end # GPIO base -- cgit v1.2.3