From 925e3896d000e59698926ba8a043b699eaf0e87c Mon Sep 17 00:00:00 2001 From: Jason Glenesk Date: Mon, 26 Apr 2021 16:34:04 -0700 Subject: mb/amd/majolica:Set IRQ for GPIO controller AMD GPIO driver will not load if IRQ is not set. As a consequence, it does not clear the interrupt when waking from S0i3. BUG=178728116 TEST=Perform 2 S0i3 cycles, confirming second cycle does not return instantly due to first interrupt not being cleared. Change-Id: I3072263e8e68f939a47ed4125444c60133087824 Signed-off-by: Jason Glenesk Reviewed-on: https://review.coreboot.org/c/coreboot/+/52682 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel --- src/mainboard/amd/majolica/mainboard.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard') diff --git a/src/mainboard/amd/majolica/mainboard.c b/src/mainboard/amd/majolica/mainboard.c index 1a7be4be29..2dd2d57241 100644 --- a/src/mainboard/amd/majolica/mainboard.c +++ b/src/mainboard/amd/majolica/mainboard.c @@ -52,7 +52,7 @@ static const struct fch_irq_routing { { PIRQ_SDIO, PIRQ_NC, PIRQ_NC }, { PIRQ_SATA, PIRQ_NC, PIRQ_NC }, { PIRQ_EMMC, PIRQ_NC, PIRQ_NC }, - { PIRQ_GPIO, PIRQ_NC, PIRQ_NC }, + { PIRQ_GPIO, 7, 7 }, { PIRQ_I2C2, PIRQ_NC, PIRQ_NC }, { PIRQ_I2C3, PIRQ_NC, PIRQ_NC }, { PIRQ_UART0, 4, 4 }, -- cgit v1.2.3