From 91c47c0deac054d5b949d1bf1be7c0e7cbf7d545 Mon Sep 17 00:00:00 2001 From: Denis 'GNUtoo' Carikli Date: Mon, 9 Dec 2019 00:40:31 +0100 Subject: asrock/e350m1: Switch away from ROMCC_BOOTBLOCK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ie14db10b6a72e19ac67254ca8f95bcf6ac8af8d3 Signed-off-by: Denis 'GNUtoo' Carikli Reviewed-on: https://review.coreboot.org/c/coreboot/+/37703 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki Reviewed-by: Arthur Heymans --- src/mainboard/asrock/e350m1/Kconfig | 1 - src/mainboard/asrock/e350m1/Makefile.inc | 2 ++ src/mainboard/asrock/e350m1/bootblock.c | 25 +++++++++++++++++++++++++ src/mainboard/asrock/e350m1/romstage.c | 28 ---------------------------- 4 files changed, 27 insertions(+), 29 deletions(-) create mode 100644 src/mainboard/asrock/e350m1/bootblock.c delete mode 100644 src/mainboard/asrock/e350m1/romstage.c (limited to 'src/mainboard') diff --git a/src/mainboard/asrock/e350m1/Kconfig b/src/mainboard/asrock/e350m1/Kconfig index 86eaac8ba5..3bbc2a5150 100644 --- a/src/mainboard/asrock/e350m1/Kconfig +++ b/src/mainboard/asrock/e350m1/Kconfig @@ -17,7 +17,6 @@ if BOARD_ASROCK_E350M1 config BOARD_SPECIFIC_OPTIONS def_bool y - select ROMCC_BOOTBLOCK select CPU_AMD_AGESA_FAMILY14 select NORTHBRIDGE_AMD_AGESA_FAMILY14 select SOUTHBRIDGE_AMD_CIMX_SB800 diff --git a/src/mainboard/asrock/e350m1/Makefile.inc b/src/mainboard/asrock/e350m1/Makefile.inc index 440744c479..ffea060d80 100644 --- a/src/mainboard/asrock/e350m1/Makefile.inc +++ b/src/mainboard/asrock/e350m1/Makefile.inc @@ -13,6 +13,8 @@ # GNU General Public License for more details. # +bootblock-y += bootblock.c + romstage-y += buildOpts.c romstage-y += BiosCallOuts.c romstage-y += OemCustomize.c diff --git a/src/mainboard/asrock/e350m1/bootblock.c b/src/mainboard/asrock/e350m1/bootblock.c new file mode 100644 index 0000000000..ea6aac093a --- /dev/null +++ b/src/mainboard/asrock/e350m1/bootblock.c @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include + +#define SERIAL_DEV PNP_DEV(0x2e, NCT5572D_SP1) + +void bootblock_mainboard_early_init(void) +{ + nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c deleted file mode 100644 index 27a1fac815..0000000000 --- a/src/mainboard/asrock/e350m1/romstage.c +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include - -#define SERIAL_DEV PNP_DEV(0x2e, NCT5572D_SP1) - - -void board_BeforeAgesa(struct sysinfo *cb) -{ - sb_Poweron_Init(); - nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -} -- cgit v1.2.3