From 8ead1dc8752b4cc7979792295940d973714394ac Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 30 Nov 2020 14:30:15 -0600 Subject: src/lib: Add Kconfig option for SPD cache in FMAP Currently, the option to cache DIMM SPD data in an FMAP region is closely coupled to a single board (google/hatch) and requires a custom FMAP to utilize. Loosen this coupling by introducing a Kconfig option which adds a correctly sized and aligned RW_SPD_CACHE region to the default FMAP. Add a Kconfig option for the region name, replacing the existing hard- coded instance in spd_cache.h. Change the inclusion of spd_cache.c to use this new Kconfig, rather than the board-specific one currently used. Lastly, have google/hatch select the new Kconfig when appropriate to ensure no change in current functionality. Test: build/boot WYVERN google/hatch variant with default FMAP, verify FMAP contains RW_SPD_CACHE, verify SPD cache used via cbmem log. Also tested on an out-of-tree Purism board. Change-Id: Iee0e7acb01e238d7ed354e3dbab1207903e3a4fc Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/48520 Reviewed-by: Tim Wawrzynczak Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/mainboard/google/hatch/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/mainboard') diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index 20b71038d4..a4e91b6b0a 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -86,6 +86,7 @@ config ROMSTAGE_SPD_CBFS config ROMSTAGE_SPD_SMBUS bool default n + select SPD_CACHE_IN_FMAP config DRIVER_TPM_SPI_BUS default 0x1 -- cgit v1.2.3