From 8e6d5f2937c169914e46b5ebc973e5df5e4290a7 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Sun, 30 Aug 2020 13:51:44 +0530 Subject: {include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent Convert 0X -> 0x Signed-off-by: Subrata Banik Change-Id: Iea3ca67908135d0e85083a05bad2ea176ca34095 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44926 Tested-by: build bot (Jenkins) Reviewed-by: HAOUAS Elyes Reviewed-by: Paul Menzel Reviewed-by: Angel Pons --- .../google/octopus/variants/baseboard/devicetree.cb | 4 ++-- .../google/poppy/variants/nami/include/variant/sku.h | 18 +++++++++--------- 2 files changed, 11 insertions(+), 11 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb index ea5325a57e..9ac02fd4a4 100644 --- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb @@ -273,8 +273,8 @@ chip soc/intel/apollolake # RegOrValue (15:8): 0x2 and RegAndValue (7:0) 0xF8. # The register is defined as: D[7:3] RSVD, D[2:0] PWROKDELAY. # uint8 RegOrValue, RegAndValue, PmicReadReg - # RegOrValue = (UINT8)((PmicPmcIpcCtrl >> 8) & 0Xff); - # RegAndValue = (UINT8)(PmicPmcIpcCtrl & 0Xff); + # RegOrValue = (UINT8)((PmicPmcIpcCtrl >> 8) & 0xff); + # RegAndValue = (UINT8)(PmicPmcIpcCtrl & 0xff); # PmicReadReg &= RegAndValue; # PmicReadReg |= RegOrValue; # PmicReadReg value will be programmed into PMIC D[2:0] PWROKDELAY field diff --git a/src/mainboard/google/poppy/variants/nami/include/variant/sku.h b/src/mainboard/google/poppy/variants/nami/include/variant/sku.h index 158f0d1a8c..5486670adf 100644 --- a/src/mainboard/google/poppy/variants/nami/include/variant/sku.h +++ b/src/mainboard/google/poppy/variants/nami/include/variant/sku.h @@ -22,15 +22,15 @@ #define SKU_0_SYNDRA 0x2BC63 #define SKU_1_SYNDRA 0x2BC62 #define SKU_2_SYNDRA 0x2BC61 -#define SKU_3_SYNDRA 0X2BC60 -#define SKU_4_SYNDRA 0X6BC63 -#define SKU_5_SYNDRA 0X6BC62 -#define SKU_6_SYNDRA 0X6BC61 -#define SKU_7_SYNDRA 0X6BC60 +#define SKU_3_SYNDRA 0x2BC60 +#define SKU_4_SYNDRA 0x6BC63 +#define SKU_5_SYNDRA 0x6BC62 +#define SKU_6_SYNDRA 0x6BC61 +#define SKU_7_SYNDRA 0x6BC60 #define SKU_0_EKKO 0x10118E3 #define SKU_1_EKKO 0x10018E3 #define SKU_2_EKKO 0x10118E1 -#define SKU_3_EKKO 0X10018E1 +#define SKU_3_EKKO 0x10018E1 #define SKU_4_EKKO 0x10118E2 #define SKU_5_EKKO 0x10018E2 #define SKU_6_EKKO 0x10118E0 @@ -38,9 +38,9 @@ #define SKU_0_BARD 0x1019CE3 #define SKU_1_BARD 0x1009CE3 #define SKU_2_BARD 0x1019CE1 -#define SKU_3_BARD 0X1009CE1 -#define SKU_4_BARD 0X1009CE0 -#define SKU_5_BARD 0X1009CE2 +#define SKU_3_BARD 0x1009CE1 +#define SKU_4_BARD 0x1009CE0 +#define SKU_5_BARD 0x1009CE2 #define SKU_6_BARD 0x1019CE0 #define SKU_7_BARD 0x1019CE2 -- cgit v1.2.3