From 80604cdf0337dcbd9baf7f7464845b3cddf91f8a Mon Sep 17 00:00:00 2001 From: Philip Chen Date: Thu, 20 Jun 2019 18:05:28 -0700 Subject: mb/google/hatch: Add a GPIO to enable/disable FPMCU power A FPMCU power-control pin (GPP_C11) is added to the latest hatch reference schematic. Even though this is not implemented in hatch rev1 board, the future hatch family boards with FPMCU should all have this control pin. On the old boards without this control pin, GPP_C11 is a floating TP, and thus this patch should be backward-compatible. BUG=b:130307667, b:135216932 TEST=build Signed-off-by: Philip Chen Change-Id: I6a84eeb6aab562258e749a8a5d09dadfa0e43587 Reviewed-on: https://review.coreboot.org/c/coreboot/+/33655 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/mainboard/google/hatch/variants/baseboard/gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index 5d0b8614dd..9529cc750a 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -139,8 +139,8 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), /* C10 : GPP_10 ==> GPP_C10_TP */ PAD_NC(GPP_C10, NONE), - /* C11 : GPP_11 ==> GPP_C11_TP */ - PAD_NC(GPP_C11, NONE), + /* C11 : GPP_11 ==> EN_FP_RAILS */ + PAD_CFG_GPO(GPP_C11, 1, DEEP), /* C12 : GPP_C12 ==> NC */ PAD_NC(GPP_C12, NONE), /* C13 : EC_PCH_INT_L -- cgit v1.2.3