From 7fc6114f8921f5bf9bc07fdac9653c97be7421a1 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Sat, 13 Jan 2024 22:25:39 +0100 Subject: mb/lenovo/x220: Convert remaining PCI numbers into reference names Change-Id: Ife8f3bc8b7fd14bb9a0e8dd4bc3d33b44c8f794f Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/79939 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/mainboard/lenovo/x220/variants/x1/overridetree.cb | 8 ++++---- src/mainboard/lenovo/x220/variants/x220/overridetree.cb | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/lenovo/x220/variants/x1/overridetree.cb b/src/mainboard/lenovo/x220/variants/x1/overridetree.cb index d2361396f2..2defac8c1c 100644 --- a/src/mainboard/lenovo/x220/variants/x1/overridetree.cb +++ b/src/mainboard/lenovo/x220/variants/x1/overridetree.cb @@ -21,10 +21,10 @@ chip northbridge/intel/sandybridge # X1 does not have ExpressCard slot register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" - device pci 1c.0 off end # PCIe Port #1 - device pci 1c.2 off end # PCIe Port #3 - device pci 1c.3 off end # PCIe Port #4 - device pci 1f.0 on #LPC bridge + device ref pcie_rp1 off end # PCIe Port #1 + device ref pcie_rp3 off end # PCIe Port #3 + device ref pcie_rp4 off end # PCIe Port #4 + device ref lpc on #LPC bridge chip ec/lenovo/h8 device pnp ff.2 on end # dummy register "config2" = "0xe0" diff --git a/src/mainboard/lenovo/x220/variants/x220/overridetree.cb b/src/mainboard/lenovo/x220/variants/x220/overridetree.cb index 8e939fd14c..932548095c 100644 --- a/src/mainboard/lenovo/x220/variants/x220/overridetree.cb +++ b/src/mainboard/lenovo/x220/variants/x220/overridetree.cb @@ -1,7 +1,7 @@ chip northbridge/intel/sandybridge device domain 0 on chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - device pci 1f.0 on #LPC bridge + device ref lpc on #LPC bridge chip ec/lenovo/h8 device pnp ff.2 on end # dummy register "eventa_enable" = "0x01" -- cgit v1.2.3