From 7c06dd9e2628fdd8b7f501383f5dad3c9dfdf8d6 Mon Sep 17 00:00:00 2001 From: Yidi Lin Date: Thu, 8 Apr 2021 09:55:11 +0800 Subject: mb/google/cherry: Pass reset gpio parameter to BL31 To support gpio reset SoC, we need to pass the reset gpio parameter to BL31. TEST=execute `echo b > /proc/sysrq-trigger` to reboot system Change-Id: I1a55216c0d5a00bbdb373d931bd50ebe7ca5694f Signed-off-by: Yidi Lin Reviewed-on: https://review.coreboot.org/c/coreboot/+/54013 Tested-by: build bot (Jenkins) Reviewed-by: Hung-Te Lin Reviewed-by: Yu-Ping Wu --- src/mainboard/google/cherry/mainboard.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'src/mainboard') diff --git a/src/mainboard/google/cherry/mainboard.c b/src/mainboard/google/cherry/mainboard.c index 5015531d9a..2607a2dfb4 100644 --- a/src/mainboard/google/cherry/mainboard.c +++ b/src/mainboard/google/cherry/mainboard.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include #include @@ -12,6 +13,10 @@ #include #include +#include "gpio.h" + +#include + DEFINE_BITFIELD(MSDC0_DRV, 29, 0) DEFINE_BITFIELD(MSDC1_DRV, 17, 0) DEFINE_BITFIELD(MSDC1_GPIO_MODE0_0, 26, 24) @@ -31,6 +36,17 @@ enum { MSDC1_GPIO_MODE1_BASE = 0x100053e0, }; +static void register_reset_to_bl31(void) +{ + static struct bl_aux_param_gpio param_reset = { + .h = { .type = BL_AUX_PARAM_MTK_RESET_GPIO }, + .gpio = { .polarity = ARM_TF_GPIO_LEVEL_HIGH }, + }; + + param_reset.gpio.index = GPIO_RESET.id; + register_bl31_aux_param(¶m_reset.h); +} + static void configure_emmc(void) { void *gpio_base = (void *)IOCFG_TL_BASE; @@ -107,6 +123,8 @@ static void mainboard_init(struct device *dev) configure_emmc(); configure_sdcard(); setup_usb_host(); + + register_reset_to_bl31(); } static void mainboard_enable(struct device *dev) -- cgit v1.2.3