From 7bab4c90a72a0e3599d6dbda0a72e8d470fd3fbf Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Thu, 30 Apr 2020 10:34:37 -0500 Subject: mb/google/reef: add default non-ChromeOS FMAP Add a FMAP which supports SMMSTORE and non-ChromeOS payloads, since Apollo Lake-based devices like Reef cannot use an automatically-generated FMAP due to strict layout requirements. Change-Id: If570f92f4f81c0e29777c87756fc5e45af549064 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/40907 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/mainboard/google/reef/Kconfig | 3 +++ src/mainboard/google/reef/default.fmd | 28 ++++++++++++++++++++++++++++ 2 files changed, 31 insertions(+) create mode 100644 src/mainboard/google/reef/default.fmd (limited to 'src/mainboard') diff --git a/src/mainboard/google/reef/Kconfig b/src/mainboard/google/reef/Kconfig index 5d782b1cef..6b970b28ac 100644 --- a/src/mainboard/google/reef/Kconfig +++ b/src/mainboard/google/reef/Kconfig @@ -100,4 +100,7 @@ config PRERAM_CBMEM_CONSOLE_SIZE default 0xe00 if CHROMEOS default 0xc00 +config FMDFILE + default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/default.fmd" if !CHROMEOS + endif # BOARD_GOOGLE_REEF diff --git a/src/mainboard/google/reef/default.fmd b/src/mainboard/google/reef/default.fmd new file mode 100644 index 0000000000..d6433137ab --- /dev/null +++ b/src/mainboard/google/reef/default.fmd @@ -0,0 +1,28 @@ +FLASH 16M { + SI_DESC@0x0 0x1000 + SI_BIOS@0x1000 0xf6f000 { + IFWI@0x0 0x1ff000 + # SMMSTORE requires 64k alignment + SMMSTORE@0xa5e000 0x40000 + UNIFIED_MRC_CACHE 0x21000 { + RECOVERY_MRC_CACHE@0x0 0x10000 + RW_MRC_CACHE 0x10000 + RW_VAR_MRC_CACHE 0x1000 + } + FMAP 0x300 + COREBOOT(CBFS) + BIOS_UNUSABLE 0x4f000 + } + DEVICE_EXTENSION@0xf7f000 0x80000 + # Currently, it is required that the BIOS region be a multiple of 8KiB. + # This is required so that the recovery mechanism can find SIGN_CSE + # region aligned to 4K at the center of BIOS region. Since the + # descriptor at the beginning uses 4K and BIOS starts at an offset of + # 4K, a hole of 4K is created towards the end of the flash to compensate + # for the size requirement of BIOS region. + # FIT tool thus creates descriptor with following regions: + # Descriptor --> 0 to 4K + # BIOS --> 4K to 0xf7f000 + # Device ext --> 0xf7f000 to 0xfff000 + UNUSED_HOLE@0xfff000 0x1000 +} -- cgit v1.2.3