From 73be43a139f15dfa526b0eeefb5539b35cc0902f Mon Sep 17 00:00:00 2001 From: Dave Frodin Date: Fri, 16 Nov 2012 14:16:33 -0700 Subject: Persimmon: Disable the unused GPP PCIe clocks Change-Id: I4128af7912bec090bbd48acc1b20d0452e7a4a28 Signed-off-by: Dave Frodin Reviewed-on: http://review.coreboot.org/1876 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer Reviewed-by: Zheng Bao Reviewed-by: Marc Jones --- src/mainboard/amd/persimmon/mainboard.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'src/mainboard') diff --git a/src/mainboard/amd/persimmon/mainboard.c b/src/mainboard/amd/persimmon/mainboard.c index 4c52dc3233..5edacd3ab6 100644 --- a/src/mainboard/amd/persimmon/mainboard.c +++ b/src/mainboard/amd/persimmon/mainboard.c @@ -28,6 +28,7 @@ #include "BiosCallOuts.h" #include #include +#include "SBPLATFORM.h" void set_pcie_reset(void); void set_pcie_dereset(void); @@ -63,6 +64,15 @@ static void persimmon_enable(device_t dev) #if CONFIG_HAVE_ACPI_RESUME acpi_slp_type = acpi_get_sleep_type(); #endif + + /* enable GPP CLK0 thru CLK1 */ + /* disable GPP CLK2 thru SLT_GFX_CLK */ + u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE); + *(misc_mem_clk_cntrl + 0) = 0xFF; + *(misc_mem_clk_cntrl + 1) = 0x00; + *(misc_mem_clk_cntrl + 2) = 0x00; + *(misc_mem_clk_cntrl + 3) = 0x00; + *(misc_mem_clk_cntrl + 4) = 0x00; } struct chip_operations mainboard_ops = { -- cgit v1.2.3