From 7391fd8084b1267ca3413e1c12b98bf7d690dfdf Mon Sep 17 00:00:00 2001 From: Tim Wawrzynczak Date: Tue, 23 Apr 2019 09:42:43 -0600 Subject: mb/google/hatch/: FPMCU not rebooted when DUT reboots Add FP_RST_ODL to early GPIO table, configured as low, so that the FPMCU will get reset when coreboot enters bootblock. BUG=b:130229952 BRANCH=none TEST=Compiles (no Hatch device w/FP to test) Change-Id: I8a8d8cc2c560f6518337f7500575fdc2265b6347 Signed-off-by: Tim Wawrzynczak Reviewed-on: https://review.coreboot.org/c/coreboot/+/32419 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Paul Fagerburg --- src/mainboard/google/hatch/variants/baseboard/gpio.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/mainboard') diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index df1c65ea1f..c12aa640b6 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -441,6 +441,8 @@ const struct pad_config *__weak variant_sleep_gpio_table( /* GPIOs needed prior to ramstage. */ static const struct pad_config early_gpio_table[] = { + /* A12 : FPMCU_RST_ODL */ + PAD_CFG_GPO(GPP_A12, 0, DEEP), /* B15 : H1_SLAVE_SPI_CS_L */ PAD_CFG_NF(GPP_B15, NONE, DEEP, NF1), /* B16 : H1_SLAVE_SPI_CLK */ -- cgit v1.2.3