From 71f846c13769f037fbdf649224d03377948b7fa9 Mon Sep 17 00:00:00 2001 From: Ed Swierk Date: Sun, 30 Mar 2008 11:31:15 +0000 Subject: Like other Intel chipsets, the Intel 3100 has a TCO timer that reboots the system automatically unless software resets the timer periodically. The extra reboot extends boot time by several seconds. The attached patch adds a function to the Intel 3100 southbridge code that halts the TCO timer, thus preventing this extra reboot, and calls the function early in the boot process on the Mt. Arvon board. It also fixes a bug in the LPC device initialization -- the ACPI BAR enable flag is bit 7, not bit 4. Signed-off-by: Ed Swierk Acked-by: Uwe Hermann git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3198 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/intel/mtarvon/auto.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/mainboard') diff --git a/src/mainboard/intel/mtarvon/auto.c b/src/mainboard/intel/mtarvon/auto.c index 643e9841ec..dd4b76346c 100644 --- a/src/mainboard/intel/mtarvon/auto.c +++ b/src/mainboard/intel/mtarvon/auto.c @@ -90,6 +90,9 @@ static void main(unsigned long bist) uart_init(); console_init(); + /* Prevent the TCO timer from rebooting us */ + i3100_halt_tco_timer(); + /* Halt if there was a built in self test failure */ report_bist_failure(bist); -- cgit v1.2.3