From 6de8b424824069345714001766b389f0b992df8e Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 26 Oct 2021 20:46:21 +0530 Subject: arch/x86: Refactor the SMBIOS type 17 write function List of changes: 1. Create Module Type macros as per Memory Type (i.e. DDR2/DDR3/DDR4/DDR5/LPDDR4/LPDDR5) and fix compilation issue due to renaming of existing macros due to scoping the Memory Type. 2. Use dedicated Memory Type and Module type for `Form Factor` and `TypeDetail` conversion using `get_spd_info()` function. 3. Create a new API (convert_form_factor_to_module_type()) for `Form Factor` to 'Module type' conversion as per `Memory Type`. 4. Add new argument as `Memory Type` to smbios_form_factor_to_spd_mod_type() so that it can internally call convert_form_factor_to_module_type() for `Module Type` conversion. 5. Update `test_smbios_form_factor_to_spd_mod_type()` to accommodate different memory types. 6. Skip fixed module type to form factor conversion using DDR2 SPD4 specification (inside dimm_info_fill()). Refer to datasheet SPD4.1.2.M-1 for LPDDRx and SPD4.1.2.L-3 for DDRx. BUG=b:194659789 TEST=Refer to dmidecode -t 17 output as below: Without this code change: Handle 0x0012, DMI type 17, 40 bytes Memory Device Array Handle: 0x000A Error Information Handle: Not Provided Total Width: 16 bits Data Width: 16 bits Size: 2048 MB Form Factor: Unknown .... With this code change: Handle 0x0012, DMI type 17, 40 bytes Memory Device Array Handle: 0x000A Error Information Handle: Not Provided Total Width: 16 bits Data Width: 16 bits Size: 2048 MB Form Factor: Row Of Chips .... Change-Id: Ia337ac8f50b61ae78d86a07c7a86aa9c248bad50 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/56628 Tested-by: build bot (Jenkins) Reviewed-by: Jakub Czapiga Reviewed-by: Tim Wawrzynczak --- src/mainboard/scaleway/tagada/ramstage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard') diff --git a/src/mainboard/scaleway/tagada/ramstage.c b/src/mainboard/scaleway/tagada/ramstage.c index 6d5d3ff4fd..bb0a385f7e 100644 --- a/src/mainboard/scaleway/tagada/ramstage.c +++ b/src/mainboard/scaleway/tagada/ramstage.c @@ -83,5 +83,5 @@ void mainboard_add_dimm_info( int channel, int dimm, int index) { /* Mainboard only has DDR4 DIMM slots */ - mem_info->dimm[index].mod_type = SPD_UDIMM; + mem_info->dimm[index].mod_type = DDR4_SPD_UDIMM; } -- cgit v1.2.3