From 6ab5ed3b66fc215d0d03b19ab02fdcf8613c7d09 Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Wed, 29 May 2019 09:24:18 -0600 Subject: soc/amd/stoneyridge: Move LPC support to common AMD devices traditionally have the LPC-ISA bus at 14.3 and the definition has been very consistent. Relocate the feature from stoneyridge into common/block. BUG=b:131682806 Change-Id: I8d7175b8642bb17533bb2287b3e3ee3d52e85a75 Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/c/coreboot/+/32653 Reviewed-by: Martin Roth Tested-by: build bot (Jenkins) --- src/mainboard/google/kahlee/bootblock/bootblock.c | 3 ++- src/mainboard/google/kahlee/ec.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/kahlee/bootblock/bootblock.c b/src/mainboard/google/kahlee/bootblock/bootblock.c index 3be308e2d3..e403684a41 100644 --- a/src/mainboard/google/kahlee/bootblock/bootblock.c +++ b/src/mainboard/google/kahlee/bootblock/bootblock.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -61,5 +62,5 @@ void bootblock_mainboard_init(void) } /* Setup TPM decode before verstage */ - sb_tpm_decode_spi(); + lpc_tpm_decode_spi(); } diff --git a/src/mainboard/google/kahlee/ec.c b/src/mainboard/google/kahlee/ec.c index 7164591e11..1080902702 100644 --- a/src/mainboard/google/kahlee/ec.c +++ b/src/mainboard/google/kahlee/ec.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -49,7 +50,7 @@ static void early_ec_init(void) printk(BIOS_DEBUG, "LPC Setup google_chromeec_ioport_range: %04x, %08zx\n", ec_ioport_base, ec_ioport_size); - status = sb_set_wideio_range(ec_ioport_base, ec_ioport_size); + status = lpc_set_wideio_range(ec_ioport_base, ec_ioport_size); if (status == WIDEIO_RANGE_ERROR) printk(BIOS_WARNING, "ERROR: Failed to assign a range\n"); else -- cgit v1.2.3