From 68b6eb78d2b86d43d3d285a88a686de20751cb81 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sun, 13 Oct 2019 23:26:36 +0200 Subject: soc/intel/braswell: Use common sb code for SPI lockdown configuration This removes the weakly linked function to configure the SPI lockdown. Change-Id: I1e7be41a9470b37ad954d3120a67fc4d93633113 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/36007 Reviewed-by: Angel Pons Reviewed-by: Frans Hendriks Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/mainboard/facebook/fbg1701/w25q64.c | 47 +++------------------------------ src/mainboard/google/cyan/w25q64.c | 42 +++-------------------------- src/mainboard/intel/strago/w25q64.c | 41 +++------------------------- src/mainboard/portwell/m107/w25q64.c | 47 +++------------------------------ 4 files changed, 12 insertions(+), 165 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/facebook/fbg1701/w25q64.c b/src/mainboard/facebook/fbg1701/w25q64.c index bc908f04b3..2f131f4ec6 100644 --- a/src/mainboard/facebook/fbg1701/w25q64.c +++ b/src/mainboard/facebook/fbg1701/w25q64.c @@ -20,57 +20,16 @@ #include /* - * SPI lockdown configuration + * SPI VSCC configuration */ -#define SPI_OPMENU_0 CMD_W25_WRSR /* Write Status Register */ -#define SPI_OPTYPE_0 SPI_OPTYPE_WR_NOADDR /* Write, no address */ - -#define SPI_OPMENU_1 CMD_W25_PP /* BYPR: Byte Program */ -#define SPI_OPTYPE_1 SPI_OPTYPE_WR_ADDR /* Write, address required */ - -#define SPI_OPMENU_2 CMD_W25_READ /* Read Data */ -#define SPI_OPTYPE_2 SPI_OPTYPE_RD_ADDR /* Read, address required */ - -#define SPI_OPMENU_3 CMD_W25_RDSR /* Read Status Register */ -#define SPI_OPTYPE_3 SPI_OPTYPE_RD_NOADDR /* Read, no address */ - -#define SPI_OPMENU_4 CMD_W25_SE /* Sector Erase */ -#define SPI_OPTYPE_4 SPI_OPTYPE_WR_ADDR /* Write, address required */ - -#define SPI_OPMENU_5 CMD_W25_RDID /* Read ID */ -#define SPI_OPTYPE_5 SPI_OPTYPE_RD_NOADDR /* Read, no address */ - -#define SPI_OPMENU_6 CMD_W25_BE /* BE: Block Erase */ -#define SPI_OPTYPE_6 SPI_OPTYPE_WR_ADDR /* Write, address required */ - -#define SPI_OPMENU_7 CMD_W25_FAST_READ /* FAST: Fast Read */ -#define SPI_OPTYPE_7 SPI_OPTYPE_RD_ADDR /* Read, address required */ - -#define SPI_OPPREFIX CMD_W25_WREN /* WREN only to be inline */ - /* with flashrom */ - -#define SPI_OPTYPE ((SPI_OPTYPE_7 << 14) | (SPI_OPTYPE_6 << 12) | \ - (SPI_OPTYPE_5 << 10) | (SPI_OPTYPE_4 << 8) | \ - (SPI_OPTYPE_3 << 6) | (SPI_OPTYPE_2 << 4) | \ - (SPI_OPTYPE_1 << 2) | (SPI_OPTYPE_0 << 0)) - -#define SPI_OPMENU_UPPER ((SPI_OPMENU_7 << 24) | (SPI_OPMENU_6 << 16) | \ - (SPI_OPMENU_5 << 8) | (SPI_OPMENU_4 << 0)) - -#define SPI_OPMENU_LOWER ((SPI_OPMENU_3 << 24) | (SPI_OPMENU_2 << 16) | \ - (SPI_OPMENU_1 << 8) | (SPI_OPMENU_0 << 0)) - #define SPI_VSCC (WG_64_BYTE | EO(0x20) | BES_4_KB) -static const struct spi_config spi_config = { - .preop = CMD_W25_WREN, - .optype = SPI_OPTYPE, - .opmenu = { SPI_OPMENU_LOWER, SPI_OPMENU_UPPER }, +static const struct vscc_config spi_config = { .lvscc = SPI_VSCC, .uvscc = SPI_VSCC, }; -int mainboard_get_spi_config(struct spi_config *cfg) +int mainboard_get_spi_vscc_config(struct vscc_config *cfg) { memcpy(cfg, &spi_config, sizeof(*cfg)); diff --git a/src/mainboard/google/cyan/w25q64.c b/src/mainboard/google/cyan/w25q64.c index 861a4645f8..5eea802942 100644 --- a/src/mainboard/google/cyan/w25q64.c +++ b/src/mainboard/google/cyan/w25q64.c @@ -18,52 +18,16 @@ #include /* - * SPI lockdown configuration W25Q64FW. + * SPI VSCC configuration W25Q64FW. */ -#define SPI_OPMENU_0 0x01 /* WRSR: Write Status Register */ -#define SPI_OPTYPE_0 0x01 /* Write, no address */ - -#define SPI_OPMENU_1 0x02 /* BYPR: Byte Program */ -#define SPI_OPTYPE_1 0x03 /* Write, address required */ - -#define SPI_OPMENU_2 0x03 /* READ: Read Data */ -#define SPI_OPTYPE_2 0x02 /* Read, address required */ - -#define SPI_OPMENU_3 0x05 /* RDSR: Read Status Register */ -#define SPI_OPTYPE_3 0x00 /* Read, no address */ - -#define SPI_OPMENU_4 0x20 /* SE20: Sector Erase 0x20 */ -#define SPI_OPTYPE_4 0x03 /* Write, address required */ - -#define SPI_OPMENU_5 0x9f /* RDID: Read ID */ -#define SPI_OPTYPE_5 0x00 /* Read, no address */ - -#define SPI_OPMENU_6 0xd8 /* BED8: Block Erase 0xd8 */ -#define SPI_OPTYPE_6 0x03 /* Write, address required */ - -#define SPI_OPMENU_7 0x0b /* FAST: Fast Read */ -#define SPI_OPTYPE_7 0x02 /* Read, address required */ - -#define SPI_OPPREFIX ((0x50 << 8) | 0x06) /* EWSR and WREN */ -#define SPI_OPTYPE ((SPI_OPTYPE_7 << 14) | (SPI_OPTYPE_6 << 12) | \ - (SPI_OPTYPE_5 << 10) | (SPI_OPTYPE_4 << 8) | \ - (SPI_OPTYPE_3 << 6) | (SPI_OPTYPE_2 << 4) | \ - (SPI_OPTYPE_1 << 2) | (SPI_OPTYPE_0 << 0)) -#define SPI_OPMENU_UPPER ((SPI_OPMENU_7 << 24) | (SPI_OPMENU_6 << 16) | \ - (SPI_OPMENU_5 << 8) | (SPI_OPMENU_4 << 0)) -#define SPI_OPMENU_LOWER ((SPI_OPMENU_3 << 24) | (SPI_OPMENU_2 << 16) | \ - (SPI_OPMENU_1 << 8) | (SPI_OPMENU_0 << 0)) #define SPI_VSCC (WG_64_BYTE | EO(0x20) | BES_4_KB) -static const struct spi_config spi_config = { - .preop = SPI_OPPREFIX, - .optype = SPI_OPTYPE, - .opmenu = { SPI_OPMENU_LOWER, SPI_OPMENU_UPPER }, +static const struct vscc_config spi_config = { .lvscc = SPI_VSCC, .uvscc = SPI_VSCC, }; -int mainboard_get_spi_config(struct spi_config *cfg) +int mainboard_get_spi_vscc_config(struct vscc_config *cfg) { memcpy(cfg, &spi_config, sizeof(*cfg)); diff --git a/src/mainboard/intel/strago/w25q64.c b/src/mainboard/intel/strago/w25q64.c index 861a4645f8..5598de48a1 100644 --- a/src/mainboard/intel/strago/w25q64.c +++ b/src/mainboard/intel/strago/w25q64.c @@ -18,52 +18,17 @@ #include /* - * SPI lockdown configuration W25Q64FW. + * SPI VSCC configuration W25Q64FW. */ -#define SPI_OPMENU_0 0x01 /* WRSR: Write Status Register */ -#define SPI_OPTYPE_0 0x01 /* Write, no address */ -#define SPI_OPMENU_1 0x02 /* BYPR: Byte Program */ -#define SPI_OPTYPE_1 0x03 /* Write, address required */ - -#define SPI_OPMENU_2 0x03 /* READ: Read Data */ -#define SPI_OPTYPE_2 0x02 /* Read, address required */ - -#define SPI_OPMENU_3 0x05 /* RDSR: Read Status Register */ -#define SPI_OPTYPE_3 0x00 /* Read, no address */ - -#define SPI_OPMENU_4 0x20 /* SE20: Sector Erase 0x20 */ -#define SPI_OPTYPE_4 0x03 /* Write, address required */ - -#define SPI_OPMENU_5 0x9f /* RDID: Read ID */ -#define SPI_OPTYPE_5 0x00 /* Read, no address */ - -#define SPI_OPMENU_6 0xd8 /* BED8: Block Erase 0xd8 */ -#define SPI_OPTYPE_6 0x03 /* Write, address required */ - -#define SPI_OPMENU_7 0x0b /* FAST: Fast Read */ -#define SPI_OPTYPE_7 0x02 /* Read, address required */ - -#define SPI_OPPREFIX ((0x50 << 8) | 0x06) /* EWSR and WREN */ -#define SPI_OPTYPE ((SPI_OPTYPE_7 << 14) | (SPI_OPTYPE_6 << 12) | \ - (SPI_OPTYPE_5 << 10) | (SPI_OPTYPE_4 << 8) | \ - (SPI_OPTYPE_3 << 6) | (SPI_OPTYPE_2 << 4) | \ - (SPI_OPTYPE_1 << 2) | (SPI_OPTYPE_0 << 0)) -#define SPI_OPMENU_UPPER ((SPI_OPMENU_7 << 24) | (SPI_OPMENU_6 << 16) | \ - (SPI_OPMENU_5 << 8) | (SPI_OPMENU_4 << 0)) -#define SPI_OPMENU_LOWER ((SPI_OPMENU_3 << 24) | (SPI_OPMENU_2 << 16) | \ - (SPI_OPMENU_1 << 8) | (SPI_OPMENU_0 << 0)) #define SPI_VSCC (WG_64_BYTE | EO(0x20) | BES_4_KB) -static const struct spi_config spi_config = { - .preop = SPI_OPPREFIX, - .optype = SPI_OPTYPE, - .opmenu = { SPI_OPMENU_LOWER, SPI_OPMENU_UPPER }, +static const struct vscc_config spi_config = { .lvscc = SPI_VSCC, .uvscc = SPI_VSCC, }; -int mainboard_get_spi_config(struct spi_config *cfg) +int mainboard_get_spi_vscc_config(struct vscc_config *cfg) { memcpy(cfg, &spi_config, sizeof(*cfg)); diff --git a/src/mainboard/portwell/m107/w25q64.c b/src/mainboard/portwell/m107/w25q64.c index bc908f04b3..2f131f4ec6 100644 --- a/src/mainboard/portwell/m107/w25q64.c +++ b/src/mainboard/portwell/m107/w25q64.c @@ -20,57 +20,16 @@ #include /* - * SPI lockdown configuration + * SPI VSCC configuration */ -#define SPI_OPMENU_0 CMD_W25_WRSR /* Write Status Register */ -#define SPI_OPTYPE_0 SPI_OPTYPE_WR_NOADDR /* Write, no address */ - -#define SPI_OPMENU_1 CMD_W25_PP /* BYPR: Byte Program */ -#define SPI_OPTYPE_1 SPI_OPTYPE_WR_ADDR /* Write, address required */ - -#define SPI_OPMENU_2 CMD_W25_READ /* Read Data */ -#define SPI_OPTYPE_2 SPI_OPTYPE_RD_ADDR /* Read, address required */ - -#define SPI_OPMENU_3 CMD_W25_RDSR /* Read Status Register */ -#define SPI_OPTYPE_3 SPI_OPTYPE_RD_NOADDR /* Read, no address */ - -#define SPI_OPMENU_4 CMD_W25_SE /* Sector Erase */ -#define SPI_OPTYPE_4 SPI_OPTYPE_WR_ADDR /* Write, address required */ - -#define SPI_OPMENU_5 CMD_W25_RDID /* Read ID */ -#define SPI_OPTYPE_5 SPI_OPTYPE_RD_NOADDR /* Read, no address */ - -#define SPI_OPMENU_6 CMD_W25_BE /* BE: Block Erase */ -#define SPI_OPTYPE_6 SPI_OPTYPE_WR_ADDR /* Write, address required */ - -#define SPI_OPMENU_7 CMD_W25_FAST_READ /* FAST: Fast Read */ -#define SPI_OPTYPE_7 SPI_OPTYPE_RD_ADDR /* Read, address required */ - -#define SPI_OPPREFIX CMD_W25_WREN /* WREN only to be inline */ - /* with flashrom */ - -#define SPI_OPTYPE ((SPI_OPTYPE_7 << 14) | (SPI_OPTYPE_6 << 12) | \ - (SPI_OPTYPE_5 << 10) | (SPI_OPTYPE_4 << 8) | \ - (SPI_OPTYPE_3 << 6) | (SPI_OPTYPE_2 << 4) | \ - (SPI_OPTYPE_1 << 2) | (SPI_OPTYPE_0 << 0)) - -#define SPI_OPMENU_UPPER ((SPI_OPMENU_7 << 24) | (SPI_OPMENU_6 << 16) | \ - (SPI_OPMENU_5 << 8) | (SPI_OPMENU_4 << 0)) - -#define SPI_OPMENU_LOWER ((SPI_OPMENU_3 << 24) | (SPI_OPMENU_2 << 16) | \ - (SPI_OPMENU_1 << 8) | (SPI_OPMENU_0 << 0)) - #define SPI_VSCC (WG_64_BYTE | EO(0x20) | BES_4_KB) -static const struct spi_config spi_config = { - .preop = CMD_W25_WREN, - .optype = SPI_OPTYPE, - .opmenu = { SPI_OPMENU_LOWER, SPI_OPMENU_UPPER }, +static const struct vscc_config spi_config = { .lvscc = SPI_VSCC, .uvscc = SPI_VSCC, }; -int mainboard_get_spi_config(struct spi_config *cfg) +int mainboard_get_spi_vscc_config(struct vscc_config *cfg) { memcpy(cfg, &spi_config, sizeof(*cfg)); -- cgit v1.2.3