From 662bbcfe7280b1541c4ee1c4d2ad4194b363a1df Mon Sep 17 00:00:00 2001 From: V Sowmya Date: Thu, 15 Sep 2022 08:04:10 +0530 Subject: mb/google/nissa: Disable the External 1.05v VR in S0 Disable the external 1.05v VR in S0 as a fix for the Display flicker issue in ADL-N. Please refer the Doc with ID 742988 for more details. BUG=b:248249033, b:245970842 TEST=Verified that the display flicker issue is fixed. Signed-off-by: V Sowmya Change-Id: Iaa53bfd99a550b2cffcdaee640ee3a429e93aef7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67653 Tested-by: build bot (Jenkins) Reviewed-by: Vidya Gopalakrishnan Reviewed-by: Reka Norman Reviewed-by: Kangheui Won Reviewed-by: Angel Pons --- src/mainboard/google/brya/variants/craask/overridetree.cb | 2 +- src/mainboard/google/brya/variants/nereid/overridetree.cb | 2 +- src/mainboard/google/brya/variants/nivviks/overridetree.cb | 2 +- src/mainboard/google/brya/variants/pujjo/variant.c | 2 +- src/mainboard/google/brya/variants/yaviks/overridetree.cb | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/brya/variants/craask/overridetree.cb b/src/mainboard/google/brya/variants/craask/overridetree.cb index bb0a78ad33..70571095ae 100644 --- a/src/mainboard/google/brya/variants/craask/overridetree.cb +++ b/src/mainboard/google/brya/variants/craask/overridetree.cb @@ -91,7 +91,7 @@ chip soc/intel/alderlake # Configure external V1P05/Vnn/VnnSx Rails register "ext_fivr_settings" = "{ .configure_ext_fivr = 1, - .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX, + .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0, .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX, .vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX, .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL, diff --git a/src/mainboard/google/brya/variants/nereid/overridetree.cb b/src/mainboard/google/brya/variants/nereid/overridetree.cb index a3fd656f08..b2ada07e6d 100644 --- a/src/mainboard/google/brya/variants/nereid/overridetree.cb +++ b/src/mainboard/google/brya/variants/nereid/overridetree.cb @@ -23,7 +23,7 @@ chip soc/intel/alderlake # Configure external V1P05/Vnn/VnnSx Rails register "ext_fivr_settings" = "{ .configure_ext_fivr = 1, - .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX, + .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0, .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX, .vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX, .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL, diff --git a/src/mainboard/google/brya/variants/nivviks/overridetree.cb b/src/mainboard/google/brya/variants/nivviks/overridetree.cb index d93095c034..f8c5ef45b8 100644 --- a/src/mainboard/google/brya/variants/nivviks/overridetree.cb +++ b/src/mainboard/google/brya/variants/nivviks/overridetree.cb @@ -42,7 +42,7 @@ chip soc/intel/alderlake # Configure external V1P05/Vnn/VnnSx Rails register "ext_fivr_settings" = "{ .configure_ext_fivr = 1, - .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX, + .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0, .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX, .vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX, .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL, diff --git a/src/mainboard/google/brya/variants/pujjo/variant.c b/src/mainboard/google/brya/variants/pujjo/variant.c index 54542f4dcd..a09bba90f8 100644 --- a/src/mainboard/google/brya/variants/pujjo/variant.c +++ b/src/mainboard/google/brya/variants/pujjo/variant.c @@ -10,7 +10,7 @@ void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config) config->ext_fivr_settings.configure_ext_fivr = 1; config->ext_fivr_settings.v1p05_enable_bitmap = - FIVR_ENABLE_ALL_SX; + FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0; config->ext_fivr_settings.vnn_enable_bitmap = FIVR_ENABLE_ALL_SX; diff --git a/src/mainboard/google/brya/variants/yaviks/overridetree.cb b/src/mainboard/google/brya/variants/yaviks/overridetree.cb index 5f83fc44cc..e30cc06e7b 100644 --- a/src/mainboard/google/brya/variants/yaviks/overridetree.cb +++ b/src/mainboard/google/brya/variants/yaviks/overridetree.cb @@ -14,7 +14,7 @@ chip soc/intel/alderlake # Configure external V1P05/Vnn/VnnSx Rails register "ext_fivr_settings" = "{ .configure_ext_fivr = 1, - .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX, + .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0, .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX, .vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX, .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL, -- cgit v1.2.3