From 65e803ea1048f3efe99199aae90d7523b063c8ed Mon Sep 17 00:00:00 2001
From: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com>
Date: Fri, 11 Aug 2023 09:44:03 +0900
Subject: mb/google/nissa/var/pirrha: Increase VBT_DATA_SIZE_KB to 10

Increase VBT_DATA_SIZE_KB to 10 since pirrha uses bigger VBT file.
It includes MIPI power sequence data for panel.

BUG=b:295112773
BRANCH=nissa
TEST=FW_NAME=pirrha emerge-nissa coreboot

Change-Id: Ib6c293ccb4a8df3ebbd2271e7db2de4e7bd9cc3e
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77163
Reviewed-by: Derek Huang <derekhuang@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/google/brya/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/mainboard')

diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index b1c0c778df..497f01aeb5 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -368,4 +368,8 @@ config PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS
 	int
 	default 33
 
+config VBT_DATA_SIZE_KB
+	int
+	default 10 if BOARD_GOOGLE_PIRRHA
+
 endif # BOARD_GOOGLE_BRYA_COMMON
-- 
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