From 6403167d290da235a732bd2d6157aa2124fb403a Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Sat, 21 Apr 2018 14:45:32 -0600 Subject: compiler.h: add __weak macro Instead of writing out '__attribute__((weak))' use a shorter form. Change-Id: If418a1d55052780077febd2d8f2089021f414b91 Signed-off-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/25767 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Justin TerAvest --- src/mainboard/google/cyan/romstage.c | 3 ++- src/mainboard/google/cyan/spd/spd.c | 3 ++- src/mainboard/google/kahlee/mainboard.c | 3 ++- src/mainboard/google/kahlee/romstage.c | 3 ++- src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c | 3 ++- src/mainboard/google/kahlee/variants/baseboard/gpio.c | 11 ++++++----- src/mainboard/google/kahlee/variants/baseboard/memory.c | 5 +++-- src/mainboard/google/octopus/variants/baseboard/boardid.c | 3 ++- src/mainboard/google/octopus/variants/baseboard/gpio.c | 9 +++++---- src/mainboard/google/octopus/variants/baseboard/memory.c | 5 +++-- src/mainboard/google/octopus/variants/baseboard/nhlt.c | 3 ++- src/mainboard/google/poppy/ramstage.c | 3 ++- src/mainboard/google/poppy/variants/baseboard/gpio.c | 9 +++++---- src/mainboard/google/poppy/variants/baseboard/memory.c | 5 +++-- src/mainboard/google/poppy/variants/baseboard/nhlt.c | 5 +++-- src/mainboard/google/reef/mainboard.c | 9 +++++---- src/mainboard/google/reef/variants/baseboard/gpio.c | 9 +++++---- src/mainboard/google/reef/variants/baseboard/memory.c | 5 +++-- src/mainboard/google/reef/variants/baseboard/nhlt.c | 3 ++- src/mainboard/google/zoombini/memory.c | 5 +++-- src/mainboard/google/zoombini/variants/baseboard/boardid.c | 3 ++- src/mainboard/google/zoombini/variants/baseboard/gpio.c | 7 ++++--- src/mainboard/google/zoombini/variants/baseboard/nhlt.c | 3 ++- src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c | 7 ++++--- src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c | 3 ++- src/mainboard/intel/galileo/vboot.c | 3 ++- src/mainboard/intel/glkrvp/chromeos.c | 3 ++- src/mainboard/intel/glkrvp/variants/baseboard/boardid.c | 3 ++- src/mainboard/intel/glkrvp/variants/baseboard/gpio.c | 9 +++++---- src/mainboard/intel/glkrvp/variants/baseboard/memory.c | 5 +++-- src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c | 3 ++- src/mainboard/siemens/mc_apl1/gpio.c | 5 +++-- 32 files changed, 95 insertions(+), 63 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/cyan/romstage.c b/src/mainboard/google/cyan/romstage.c index 5b4bcc0ebe..e56e3d2e1a 100644 --- a/src/mainboard/google/cyan/romstage.c +++ b/src/mainboard/google/cyan/romstage.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include #include #include #include @@ -47,7 +48,7 @@ void mainboard_memory_init_params(struct romstage_params *params, variant_memory_init_params(memory_params); } -__attribute__ ((weak)) +__weak void variant_memory_init_params(MEMORY_INIT_UPD *memory_params) { } diff --git a/src/mainboard/google/cyan/spd/spd.c b/src/mainboard/google/cyan/spd/spd.c index a3db2ed6f4..97e14eb758 100644 --- a/src/mainboard/google/cyan/spd/spd.c +++ b/src/mainboard/google/cyan/spd/spd.c @@ -16,6 +16,7 @@ #include #include +#include #include #include #include @@ -28,7 +29,7 @@ #include #include "spd_util.h" -__attribute__ ((weak)) uint8_t get_ramid(void) +__weak uint8_t get_ramid(void) { gpio_t spd_gpios[] = { GP_SW_80, /* SATA_GP3, RAMID0 */ diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c index cd37c90f28..f1df8817e7 100644 --- a/src/mainboard/google/kahlee/mainboard.c +++ b/src/mainboard/google/kahlee/mainboard.c @@ -14,6 +14,7 @@ */ #include +#include #include #include #include @@ -225,7 +226,7 @@ struct chip_operations mainboard_ops = { }; /* Variants may override this function so see definitions in variants/ */ -uint8_t __attribute__((weak)) variant_board_sku(void) +uint8_t __weak variant_board_sku(void) { return 0; } diff --git a/src/mainboard/google/kahlee/romstage.c b/src/mainboard/google/kahlee/romstage.c index 4cd2d40831..50e9931a73 100644 --- a/src/mainboard/google/kahlee/romstage.c +++ b/src/mainboard/google/kahlee/romstage.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include #include #include #include @@ -22,7 +23,7 @@ int mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len) return variant_mainboard_read_spd(spdAddress, buf, len); } -void __attribute__((weak)) variant_romstage_entry(int s3_resume) +void __weak variant_romstage_entry(int s3_resume) { /* By default, don't do anything */ } diff --git a/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c b/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c index c9ce900e22..6ed516f7c6 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c +++ b/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include #include #include #include @@ -236,7 +237,7 @@ static const PCIe_COMPLEX_DESCRIPTOR PcieNoBayhub = { * **/ /*---------------------------------------------------------------------------*/ -VOID __attribute__((weak)) OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly) +VOID __weak OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly) { InitEarly->GnbConfig.PcieComplexList = (void *)&PcieComplex; InitEarly->PlatformConfig.GnbAzI2sBusSelect = GnbAcpI2sBus; diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c index 8f4ba5c26f..cc75f29113 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/gpio.c +++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include #include #include #include @@ -485,7 +486,7 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { PAD_GPI(GPIO_135, PULL_UP), }; -const __attribute__((weak)) +const __weak struct soc_amd_gpio *variant_early_gpio_table(size_t *size) { if (board_id() < 2) { @@ -497,7 +498,7 @@ struct soc_amd_gpio *variant_early_gpio_table(size_t *size) } } -const __attribute__((weak)) +const __weak struct soc_amd_gpio *variant_gpio_table(size_t *size) { if (board_id() < 2) { @@ -565,13 +566,13 @@ static const struct sci_source gpe_table[] = { }, }; -const __attribute__((weak)) struct sci_source *get_gpe_table(size_t *num) +const __weak struct sci_source *get_gpe_table(size_t *num) { *num = ARRAY_SIZE(gpe_table); return gpe_table; } -int __attribute__((weak)) variant_get_xhci_oc_map(uint16_t *map) +int __weak variant_get_xhci_oc_map(uint16_t *map) { *map = USB_OC0 << OC_PORT0_SHIFT; /* USB-C Port0/4 = OC0 */ *map |= USB_OC1 << OC_PORT1_SHIFT; /* USB-C Port1/5 = OC1 */ @@ -580,7 +581,7 @@ int __attribute__((weak)) variant_get_xhci_oc_map(uint16_t *map) return 0; } -int __attribute__((weak)) variant_get_ehci_oc_map(uint16_t *map) +int __weak variant_get_ehci_oc_map(uint16_t *map) { *map = USB_OC_DISABLE_ALL; return 0; diff --git a/src/mainboard/google/kahlee/variants/baseboard/memory.c b/src/mainboard/google/kahlee/variants/baseboard/memory.c index b8ec917633..280140ba4d 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/memory.c +++ b/src/mainboard/google/kahlee/variants/baseboard/memory.c @@ -14,13 +14,14 @@ */ #include +#include #include #include /* src/include/gpio.h */ #include #include #include -uint8_t __attribute__((weak)) variant_memory_sku(void) +uint8_t __weak variant_memory_sku(void) { gpio_t pads[] = { [3] = MEM_CONFIG3, @@ -32,7 +33,7 @@ uint8_t __attribute__((weak)) variant_memory_sku(void) return gpio_base2_value(pads, ARRAY_SIZE(pads)); } -int __attribute__((weak)) variant_mainboard_read_spd(uint8_t spdAddress, +int __weak variant_mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len) { struct region_device spd_rdev; diff --git a/src/mainboard/google/octopus/variants/baseboard/boardid.c b/src/mainboard/google/octopus/variants/baseboard/boardid.c index 67b753e663..198baaa4aa 100644 --- a/src/mainboard/google/octopus/variants/baseboard/boardid.c +++ b/src/mainboard/google/octopus/variants/baseboard/boardid.c @@ -13,10 +13,11 @@ * GNU General Public License for more details. */ +#include #include #include -uint8_t __attribute__((weak)) variant_board_id(void) +uint8_t __weak variant_board_id(void) { return google_chromeec_get_board_version(); } diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c index 6c01c49144..8863bbbba1 100644 --- a/src/mainboard/google/octopus/variants/baseboard/gpio.c +++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c @@ -16,6 +16,7 @@ #include #include #include +#include /* * Pad configuration in ramstage. The order largely follows the 'GPIO Muxing' @@ -254,7 +255,7 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_210, 0, DEEP, NONE, HIZCRx0, DISPUPD), }; -const struct pad_config *__attribute__((weak)) variant_gpio_table(size_t *num) +const struct pad_config *__weak variant_gpio_table(size_t *num) { *num = ARRAY_SIZE(gpio_table); return gpio_table; @@ -280,7 +281,7 @@ static const struct pad_config early_gpio_table[] = { PAD_CFG_GPO(GPIO_164, 0, DEEP), /* WLAN_PE_RST */ }; -const struct pad_config *__attribute__((weak)) +const struct pad_config *__weak variant_early_gpio_table(size_t *num) { *num = ARRAY_SIZE(early_gpio_table); @@ -291,7 +292,7 @@ variant_early_gpio_table(size_t *num) static const struct pad_config sleep_gpio_table[] = { }; -const struct pad_config *__attribute__((weak)) +const struct pad_config *__weak variant_sleep_gpio_table(size_t *num) { *num = ARRAY_SIZE(sleep_gpio_table); @@ -302,7 +303,7 @@ static const struct cros_gpio cros_gpios[] = { CROS_GPIO_WP_AH(PAD_SCC(GPIO_PCH_WP), GPIO_COMM_SCC_NAME), }; -const struct cros_gpio *__attribute__((weak)) variant_cros_gpios(size_t *num) +const struct cros_gpio *__weak variant_cros_gpios(size_t *num) { *num = ARRAY_SIZE(cros_gpios); return cros_gpios; diff --git a/src/mainboard/google/octopus/variants/baseboard/memory.c b/src/mainboard/google/octopus/variants/baseboard/memory.c index 303241fc4b..4c1d359aee 100644 --- a/src/mainboard/google/octopus/variants/baseboard/memory.c +++ b/src/mainboard/google/octopus/variants/baseboard/memory.c @@ -14,6 +14,7 @@ */ #include +#include #include #include #include @@ -133,12 +134,12 @@ static const struct lpddr4_cfg lp4cfg = { .swizzle_config = &baseboard_lpddr4_swizzle, }; -const struct lpddr4_cfg *__attribute__((weak)) variant_lpddr4_config(void) +const struct lpddr4_cfg *__weak variant_lpddr4_config(void) { return &lp4cfg; } -size_t __attribute__((weak)) variant_memory_sku(void) +size_t __weak variant_memory_sku(void) { gpio_t pads[] = { [3] = MEM_CONFIG3, [2] = MEM_CONFIG2, diff --git a/src/mainboard/google/octopus/variants/baseboard/nhlt.c b/src/mainboard/google/octopus/variants/baseboard/nhlt.c index 4fc216ed51..94403a8c35 100644 --- a/src/mainboard/google/octopus/variants/baseboard/nhlt.c +++ b/src/mainboard/google/octopus/variants/baseboard/nhlt.c @@ -14,11 +14,12 @@ */ #include +#include #include #include #include -void __attribute__((weak)) variant_nhlt_init(struct nhlt *nhlt) +void __weak variant_nhlt_init(struct nhlt *nhlt) { /* 2 Channel DMIC array. */ if (!nhlt_soc_add_dmic_array(nhlt, 2)) diff --git a/src/mainboard/google/poppy/ramstage.c b/src/mainboard/google/poppy/ramstage.c index c038b4186e..ea15aea988 100644 --- a/src/mainboard/google/poppy/ramstage.c +++ b/src/mainboard/google/poppy/ramstage.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include #include #include @@ -29,7 +30,7 @@ void mainboard_silicon_init_params(FSP_SIL_UPD *params) gpio_configure_pads(pads, num); } -void __attribute__((weak)) variant_devtree_update(void) +void __weak variant_devtree_update(void) { /* Override dev tree settings per board */ } diff --git a/src/mainboard/google/poppy/variants/baseboard/gpio.c b/src/mainboard/google/poppy/variants/baseboard/gpio.c index 2fea253624..25202e6139 100644 --- a/src/mainboard/google/poppy/variants/baseboard/gpio.c +++ b/src/mainboard/google/poppy/variants/baseboard/gpio.c @@ -16,6 +16,7 @@ #include #include #include +#include /* Pad configuration in ramstage */ /* Leave eSPI pins untouched from default settings */ @@ -371,13 +372,13 @@ static const struct pad_config early_gpio_table[] = { PAD_CFG_GPI_APIC_INVERT(GPP_E0, NONE, PLTRST), }; -const struct pad_config * __attribute__((weak)) variant_gpio_table(size_t *num) +const struct pad_config * __weak variant_gpio_table(size_t *num) { *num = ARRAY_SIZE(gpio_table); return gpio_table; } -const struct pad_config * __attribute__((weak)) +const struct pad_config * __weak variant_early_gpio_table(size_t *num) { *num = ARRAY_SIZE(early_gpio_table); @@ -385,7 +386,7 @@ const struct pad_config * __attribute__((weak)) } /* override specific gpio by sku id */ -const struct pad_config * __attribute__((weak)) +const struct pad_config * __weak variant_sku_gpio_table(size_t *num) { *num = 0; @@ -397,7 +398,7 @@ static const struct cros_gpio cros_gpios[] = { CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio * __attribute__((weak)) variant_cros_gpios(size_t *num) +const struct cros_gpio * __weak variant_cros_gpios(size_t *num) { *num = ARRAY_SIZE(cros_gpios); return cros_gpios; diff --git a/src/mainboard/google/poppy/variants/baseboard/memory.c b/src/mainboard/google/poppy/variants/baseboard/memory.c index 8134f1a36e..95f2b9567c 100644 --- a/src/mainboard/google/poppy/variants/baseboard/memory.c +++ b/src/mainboard/google/poppy/variants/baseboard/memory.c @@ -14,6 +14,7 @@ */ #include +#include #include #include @@ -37,7 +38,7 @@ static const u16 rcomp_resistor[] = { 200, 81, 162 }; /* Rcomp target */ static const u16 rcomp_target[] = { 100, 40, 40, 23, 40 }; -void __attribute__((weak)) variant_memory_params(struct memory_params *p) +void __weak variant_memory_params(struct memory_params *p) { p->type = MEMORY_LPDDR3; p->dq_map = dq_map; @@ -50,7 +51,7 @@ void __attribute__((weak)) variant_memory_params(struct memory_params *p) p->rcomp_target_size = sizeof(rcomp_target); } -int __attribute__((weak)) variant_memory_sku(void) +int __weak variant_memory_sku(void) { gpio_t spd_gpios[] = { GPIO_MEM_CONFIG_0, diff --git a/src/mainboard/google/poppy/variants/baseboard/nhlt.c b/src/mainboard/google/poppy/variants/baseboard/nhlt.c index 81557e41ea..927cb242da 100644 --- a/src/mainboard/google/poppy/variants/baseboard/nhlt.c +++ b/src/mainboard/google/poppy/variants/baseboard/nhlt.c @@ -14,11 +14,12 @@ */ #include +#include #include #include #include -void __attribute__((weak)) variant_nhlt_init(struct nhlt *nhlt) +void __weak variant_nhlt_init(struct nhlt *nhlt) { /* 2 Channel DMIC array. */ if (nhlt_soc_add_dmic_array(nhlt, 2)) @@ -37,7 +38,7 @@ void __attribute__((weak)) variant_nhlt_init(struct nhlt *nhlt) printk(BIOS_ERR, "Couldn't add Realtek RT5663.\n"); } -void __attribute__((weak)) variant_nhlt_oem_overrides(const char **oem_id, +void __weak variant_nhlt_oem_overrides(const char **oem_id, const char **oem_table_id, uint32_t *oem_revision) { diff --git a/src/mainboard/google/reef/mainboard.c b/src/mainboard/google/reef/mainboard.c index 7f5a1b3857..6831d57790 100644 --- a/src/mainboard/google/reef/mainboard.c +++ b/src/mainboard/google/reef/mainboard.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -30,7 +31,7 @@ #include /* override specific gpio by sku id */ -const struct pad_config __attribute__((weak)) +const struct pad_config __weak *variant_sku_gpio_table(size_t *num) { *num = 0; @@ -73,7 +74,7 @@ uint8_t sku_strapping_value(void) return gpio_base3_value(board_sku_gpios, num); } -uint8_t __attribute__((weak)) variant_board_sku(void) +uint8_t __weak variant_board_sku(void) { static int board_sku_num = -1; @@ -84,7 +85,7 @@ uint8_t __attribute__((weak)) variant_board_sku(void) } /* Set variant board sku to ec by sku id */ -void __attribute__((weak)) variant_board_ec_set_skuid(void) +void __weak variant_board_ec_set_skuid(void) { } @@ -97,7 +98,7 @@ const char *smbios_mainboard_sku(void) return sku_str; } -void __attribute__((weak)) variant_nhlt_oem_overrides(const char **oem_id, +void __weak variant_nhlt_oem_overrides(const char **oem_id, const char **oem_table_id, uint32_t *oem_revision) { diff --git a/src/mainboard/google/reef/variants/baseboard/gpio.c b/src/mainboard/google/reef/variants/baseboard/gpio.c index 7440cf8f2c..3cd765b359 100644 --- a/src/mainboard/google/reef/variants/baseboard/gpio.c +++ b/src/mainboard/google/reef/variants/baseboard/gpio.c @@ -16,6 +16,7 @@ #include #include #include +#include /* * Pad configuration in ramstage. The order largely follows the 'GPIO Muxing' @@ -345,7 +346,7 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI(GPIO_73, UP_20K, DEEP), /* GP_CAMERASB11 */ }; -const struct pad_config * __attribute__((weak)) variant_gpio_table(size_t *num) +const struct pad_config * __weak variant_gpio_table(size_t *num) { *num = ARRAY_SIZE(gpio_table); return gpio_table; @@ -362,7 +363,7 @@ static const struct pad_config early_gpio_table[] = { PAD_CFG_GPO(GPIO_122, 0, DEEP), /* SIO_SPI_2_RXD */ }; -const struct pad_config * __attribute__((weak)) +const struct pad_config * __weak variant_early_gpio_table(size_t *num) { *num = ARRAY_SIZE(early_gpio_table); @@ -375,7 +376,7 @@ static const struct pad_config sleep_gpio_table[] = { PAD_CFG_GPI_APIC_LOW(GPIO_20, NONE, DEEP), /* NFC_INT_L */ }; -const struct pad_config * __attribute__((weak)) +const struct pad_config * __weak variant_sleep_gpio_table(u8 slp_typ, size_t *num) { *num = ARRAY_SIZE(sleep_gpio_table); @@ -388,7 +389,7 @@ static const struct cros_gpio cros_gpios[] = { CROS_GPIO_PE_AH(PAD_N(GPIO_SHIP_MODE), GPIO_COMM_N_NAME), }; -const struct cros_gpio * __attribute__((weak)) variant_cros_gpios(size_t *num) +const struct cros_gpio * __weak variant_cros_gpios(size_t *num) { *num = ARRAY_SIZE(cros_gpios); return cros_gpios; diff --git a/src/mainboard/google/reef/variants/baseboard/memory.c b/src/mainboard/google/reef/variants/baseboard/memory.c index 50e93c7d19..364c0ee093 100644 --- a/src/mainboard/google/reef/variants/baseboard/memory.c +++ b/src/mainboard/google/reef/variants/baseboard/memory.c @@ -14,6 +14,7 @@ */ #include +#include #include #include #include @@ -137,12 +138,12 @@ static const struct lpddr4_cfg lp4cfg = { .swizzle_config = &baseboard_lpddr4_swizzle, }; -const struct lpddr4_cfg * __attribute__((weak)) variant_lpddr4_config(void) +const struct lpddr4_cfg * __weak variant_lpddr4_config(void) { return &lp4cfg; } -size_t __attribute__((weak)) variant_memory_sku(void) +size_t __weak variant_memory_sku(void) { gpio_t pads[] = { [3] = MEM_CONFIG3, [2] = MEM_CONFIG2, diff --git a/src/mainboard/google/reef/variants/baseboard/nhlt.c b/src/mainboard/google/reef/variants/baseboard/nhlt.c index b9357962df..188766954e 100644 --- a/src/mainboard/google/reef/variants/baseboard/nhlt.c +++ b/src/mainboard/google/reef/variants/baseboard/nhlt.c @@ -14,13 +14,14 @@ */ #include +#include #include #include #include #include #include -void __attribute__((weak)) variant_nhlt_init(struct nhlt *nhlt) +void __weak variant_nhlt_init(struct nhlt *nhlt) { /* 1-dmic configuration */ if (IS_ENABLED(CONFIG_NHLT_DMIC_1CH_16B) && diff --git a/src/mainboard/google/zoombini/memory.c b/src/mainboard/google/zoombini/memory.c index 115886e475..e1f525590f 100644 --- a/src/mainboard/google/zoombini/memory.c +++ b/src/mainboard/google/zoombini/memory.c @@ -15,6 +15,7 @@ #include #include +#include #include #include @@ -81,12 +82,12 @@ static const struct lpddr4_cfg baseboard_lpddr4_cfg = { .ect = 0, }; -const struct lpddr4_cfg *__attribute__((weak)) variant_lpddr4_config(void) +const struct lpddr4_cfg *__weak variant_lpddr4_config(void) { return &baseboard_lpddr4_cfg; } -size_t __attribute__((weak)) variant_memory_sku(void) +size_t __weak variant_memory_sku(void) { const gpio_t pads[] = { [3] = GPIO_MEM_CONFIG_3, [2] = GPIO_MEM_CONFIG_2, diff --git a/src/mainboard/google/zoombini/variants/baseboard/boardid.c b/src/mainboard/google/zoombini/variants/baseboard/boardid.c index 1cb084ac50..c8a5cf1073 100644 --- a/src/mainboard/google/zoombini/variants/baseboard/boardid.c +++ b/src/mainboard/google/zoombini/variants/baseboard/boardid.c @@ -14,9 +14,10 @@ */ #include +#include #include -uint8_t __attribute__((weak)) variant_board_id(void) +uint8_t __weak variant_board_id(void) { return google_chromeec_get_board_version(); } diff --git a/src/mainboard/google/zoombini/variants/baseboard/gpio.c b/src/mainboard/google/zoombini/variants/baseboard/gpio.c index 47894d020f..f8c84b44e1 100644 --- a/src/mainboard/google/zoombini/variants/baseboard/gpio.c +++ b/src/mainboard/google/zoombini/variants/baseboard/gpio.c @@ -15,6 +15,7 @@ #include #include +#include /* Pad configuration in ramstage */ static const struct pad_config gpio_table[] = { @@ -255,13 +256,13 @@ static const struct pad_config early_gpio_table[] = { INVERT), /* H1_PCH_INT_ODL */ }; -const struct pad_config *__attribute__((weak)) variant_gpio_table(size_t *num) +const struct pad_config *__weak variant_gpio_table(size_t *num) { *num = ARRAY_SIZE(gpio_table); return gpio_table; } -const struct pad_config *__attribute__((weak)) +const struct pad_config *__weak variant_early_gpio_table(size_t *num) { *num = ARRAY_SIZE(early_gpio_table); @@ -272,7 +273,7 @@ static const struct cros_gpio cros_gpios[] = { CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio *__attribute__((weak)) variant_cros_gpios(size_t *num) +const struct cros_gpio *__weak variant_cros_gpios(size_t *num) { *num = ARRAY_SIZE(cros_gpios); return cros_gpios; diff --git a/src/mainboard/google/zoombini/variants/baseboard/nhlt.c b/src/mainboard/google/zoombini/variants/baseboard/nhlt.c index 0741b0d62f..ffaa6e5c96 100644 --- a/src/mainboard/google/zoombini/variants/baseboard/nhlt.c +++ b/src/mainboard/google/zoombini/variants/baseboard/nhlt.c @@ -14,11 +14,12 @@ */ #include +#include #include #include #include -void __attribute__((weak)) variant_nhlt_init(struct nhlt *nhlt) +void __weak variant_nhlt_init(struct nhlt *nhlt) { /* 1-dmic configuration */ if (IS_ENABLED(CONFIG_NHLT_DMIC_1CH_16B) && diff --git a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c index 44632e910d..fa9d0e9419 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c +++ b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c @@ -16,6 +16,7 @@ #include #include #include +#include /* Pad configuration in ramstage*/ static const struct pad_config gpio_table[] = { @@ -297,13 +298,13 @@ static const struct pad_config early_gpio_table[] = { }; -const struct pad_config *__attribute__((weak)) variant_gpio_table(size_t *num) +const struct pad_config *__weak variant_gpio_table(size_t *num) { *num = ARRAY_SIZE(gpio_table); return gpio_table; } -const struct pad_config *__attribute__((weak)) +const struct pad_config *__weak variant_early_gpio_table(size_t *num) { *num = ARRAY_SIZE(early_gpio_table); @@ -314,7 +315,7 @@ static const struct cros_gpio cros_gpios[] = { CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), }; -const struct cros_gpio * __attribute__((weak)) variant_cros_gpios(size_t *num) +const struct cros_gpio * __weak variant_cros_gpios(size_t *num) { *num = ARRAY_SIZE(cros_gpios); return cros_gpios; diff --git a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c index 9fb9be5184..6f3629e599 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c +++ b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c @@ -14,11 +14,12 @@ */ #include +#include #include #include #include -void __attribute__((weak)) variant_nhlt_init(struct nhlt *nhlt) +void __weak variant_nhlt_init(struct nhlt *nhlt) { /* 1-dmic configuration */ if (IS_ENABLED(CONFIG_NHLT_DMIC_1CH_16B) && diff --git a/src/mainboard/intel/galileo/vboot.c b/src/mainboard/intel/galileo/vboot.c index 469ec4e093..8242754a49 100644 --- a/src/mainboard/intel/galileo/vboot.c +++ b/src/mainboard/intel/galileo/vboot.c @@ -14,6 +14,7 @@ #include #include +#include #include #include #include @@ -74,7 +75,7 @@ void verstage_mainboard_init(void) reg_script_run(script); } -void __attribute__((weak)) vboot_platform_prepare_reboot(void) +void __weak vboot_platform_prepare_reboot(void) { const struct reg_script *script; diff --git a/src/mainboard/intel/glkrvp/chromeos.c b/src/mainboard/intel/glkrvp/chromeos.c index 05e8c6017a..76c83e1151 100644 --- a/src/mainboard/intel/glkrvp/chromeos.c +++ b/src/mainboard/intel/glkrvp/chromeos.c @@ -15,6 +15,7 @@ #include #include +#include #include #include #include @@ -55,7 +56,7 @@ void mainboard_chromeos_acpi_generate(void) chromeos_acpi_gpio_generate(gpios, num); } -int __attribute__((weak)) get_lid_switch(void) +int __weak get_lid_switch(void) { return -1; } diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c b/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c index 1f30f4ea63..530c06a993 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c +++ b/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c @@ -14,9 +14,10 @@ */ #include +#include #include -uint8_t __attribute__((weak)) variant_board_id(void) +uint8_t __weak variant_board_id(void) { if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)) return google_chromeec_get_board_version(); diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c index 96821d6704..7ff68a4826 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c +++ b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c @@ -16,6 +16,7 @@ #include #include #include +#include /* * Pad configuration in ramstage. The order largely follows the 'GPIO Muxing' @@ -250,7 +251,7 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF_IOSSTATE(GPIO_209, DN_20K, DEEP, NF1, HIZCRx0),/*EMMC0_STROBE*/ }; -const struct pad_config * __attribute__((weak)) variant_gpio_table(size_t *num) +const struct pad_config * __weak variant_gpio_table(size_t *num) { *num = ARRAY_SIZE(gpio_table); return gpio_table; @@ -262,7 +263,7 @@ static const struct pad_config early_gpio_table[] = { PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_178, UP_20K, DEEP, NF1), /* SMB_DATA */ }; -const struct pad_config * __attribute__((weak)) +const struct pad_config * __weak variant_early_gpio_table(size_t *num) { *num = ARRAY_SIZE(early_gpio_table); @@ -277,7 +278,7 @@ static const struct pad_config sleep_gpio_table[] = { #endif }; -const struct pad_config * __attribute__((weak)) +const struct pad_config * __weak variant_sleep_gpio_table(size_t *num) { *num = ARRAY_SIZE(sleep_gpio_table); @@ -291,7 +292,7 @@ static const struct cros_gpio cros_gpios[] = { #endif }; -const struct cros_gpio * __attribute__((weak)) variant_cros_gpios(size_t *num) +const struct cros_gpio * __weak variant_cros_gpios(size_t *num) { *num = ARRAY_SIZE(cros_gpios); return cros_gpios; diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/memory.c b/src/mainboard/intel/glkrvp/variants/baseboard/memory.c index be00ecd577..56fac2a068 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/memory.c +++ b/src/mainboard/intel/glkrvp/variants/baseboard/memory.c @@ -14,6 +14,7 @@ */ #include +#include #include #include #include @@ -133,12 +134,12 @@ static const struct lpddr4_cfg lp4cfg = { .swizzle_config = &baseboard_lpddr4_swizzle, }; -const struct lpddr4_cfg * __attribute__((weak)) variant_lpddr4_config(void) +const struct lpddr4_cfg * __weak variant_lpddr4_config(void) { return &lp4cfg; } -size_t __attribute__((weak)) variant_memory_sku(void) +size_t __weak variant_memory_sku(void) { return 0; } diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c b/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c index 45cbc8f8c2..51da3addb5 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c +++ b/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c @@ -14,11 +14,12 @@ */ #include +#include #include #include #include -void __attribute__((weak)) variant_nhlt_init(struct nhlt *nhlt) +void __weak variant_nhlt_init(struct nhlt *nhlt) { /* 1-dmic configuration */ if (IS_ENABLED(CONFIG_NHLT_DMIC_1CH_16B) && diff --git a/src/mainboard/siemens/mc_apl1/gpio.c b/src/mainboard/siemens/mc_apl1/gpio.c index b872b8d832..636d35682b 100644 --- a/src/mainboard/siemens/mc_apl1/gpio.c +++ b/src/mainboard/siemens/mc_apl1/gpio.c @@ -16,6 +16,7 @@ #include #include +#include #include "brd_gpio.h" /* @@ -363,7 +364,7 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(SVID0_CLK, UP_20K, DEEP, NF1), /* SVID0_CLK */ }; -const struct pad_config *__attribute__((weak)) brd_gpio_table(size_t *num) +const struct pad_config *__weak brd_gpio_table(size_t *num) { *num = ARRAY_SIZE(gpio_table); return gpio_table; @@ -406,7 +407,7 @@ static const struct pad_config early_gpio_table[] = { PAD_CFG_NF(LPC_FRAMEB, UP_20K, DEEP, NF1), /* LPC_FRAME_N */ }; -const struct pad_config *__attribute__((weak)) +const struct pad_config *__weak brd_early_gpio_table(size_t *num) { *num = ARRAY_SIZE(early_gpio_table); -- cgit v1.2.3