From 5492bfb55c5cec410a78a6050e8b27a2419ff914 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Fri, 17 Feb 2017 17:40:10 -0800 Subject: google/eve: Add audio devices Add the audio devices to Eve mainboard: - Describe Maxim 98927 speaker amps and RT5663 headphone codec in ACPI so they can be enumerated by the OS. - Supply NHLT binaries for MAX98927, RT5663, and DMIC_4CH. BUG=chrome-os-partner:61009 TEST=manual testing on Eve P1 with updated kernel to ensure that both speakers and headset are functional. DMIC support is is still being worked on and is not yet functional. Change-Id: I5243e35d159a0ed15c6004e94ba5a50b28cff0a9 Signed-off-by: Duncan Laurie Reviewed-on: https://review.coreboot.org/18398 Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/mainboard/google/eve/Kconfig | 7 ++++++ src/mainboard/google/eve/devicetree.cb | 25 ++++++++++++++++++++- src/mainboard/google/eve/mainboard.c | 40 ++++++++++++++++++++++++++++++++++ 3 files changed, 71 insertions(+), 1 deletion(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/eve/Kconfig b/src/mainboard/google/eve/Kconfig index 2b66eb1d17..84f2df8c51 100644 --- a/src/mainboard/google/eve/Kconfig +++ b/src/mainboard/google/eve/Kconfig @@ -8,6 +8,7 @@ config BOARD_SPECIFIC_OPTIONS select DRIVERS_I2C_HID select DRIVERS_I2C_WACOM select DRIVERS_PS2_KEYBOARD + select DRIVERS_I2C_MAX98927 select DRIVERS_SPI_ACPI select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_LPC @@ -64,4 +65,10 @@ config MAX_CPUS int default 8 +config INCLUDE_NHLT_BLOBS + bool "Include blobs for audio." + select NHLT_DMIC_4CH + select NHLT_RT5663 + select NHLT_MAX98927 + endif diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index c600b5fde2..9d46915e43 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -238,7 +238,30 @@ chip soc/intel/skylake device pci 17.0 off end # SATA device pci 19.0 on end # UART #2 device pci 19.1 off end # I2C #5 - device pci 19.2 on end # I2C #4 + device pci 19.2 on + chip drivers/i2c/max98927 + register "interleave_mode" = "1" + register "uid" = "0" + register "desc" = ""Right Speaker Amp"" + register "name" = ""MAXR"" + device i2c 39 on end + end + chip drivers/i2c/max98927 + register "interleave_mode" = "1" + register "uid" = "1" + register "desc" = ""Left Speaker Amp"" + register "name" = ""MAXL"" + device i2c 3a on end + end + chip drivers/i2c/generic + register "hid" = ""10EC5663"" + register "name" = ""RT53"" + register "desc" = ""Realtek RT5663"" + register "irq" = "IRQ_LEVEL_LOW(GPP_D9_IRQ)" + register "probed" = "1" + device i2c 13 on end + end + end # I2C #4 device pci 1c.0 on chip drivers/intel/wifi register "wake" = "GPE0_PCI_EXP" diff --git a/src/mainboard/google/eve/mainboard.c b/src/mainboard/google/eve/mainboard.c index bb3c6bdb84..2b1010182c 100644 --- a/src/mainboard/google/eve/mainboard.c +++ b/src/mainboard/google/eve/mainboard.c @@ -15,23 +15,63 @@ */ #include +#include #include #include #include #include #include +#include #include "gpio.h" +static const char *oem_id_maxim = "GOOGLE"; +static const char *oem_table_id_maxim = "EVEMAX"; + static void mainboard_init(device_t dev) { mainboard_ec_init(); gpio_configure_pads(late_gpio_table, ARRAY_SIZE(late_gpio_table)); } +static unsigned long mainboard_write_acpi_tables( + device_t device, unsigned long current, acpi_rsdp_t *rsdp) +{ + uintptr_t start_addr; + uintptr_t end_addr; + struct nhlt *nhlt; + + start_addr = current; + + nhlt = nhlt_init(); + if (!nhlt) + return start_addr; + + /* 4 Channel DMIC array. */ + if (nhlt_soc_add_dmic_array(nhlt, 4)) + printk(BIOS_ERR, "Couldn't add 4CH DMIC arrays.\n"); + + /* RT5663 Headset codec */ + if (nhlt_soc_add_rt5663(nhlt, AUDIO_LINK_SSP1)) + printk(BIOS_ERR, "Couldn't add headset codec.\n"); + + /* MAXIM98927 Smart Amps for left and right channel */ + if (nhlt_soc_add_max98927(nhlt, AUDIO_LINK_SSP0)) + printk(BIOS_ERR, "Couldn't add max98927\n"); + + end_addr = nhlt_soc_serialize_oem_overrides(nhlt, start_addr, + oem_id_maxim, oem_table_id_maxim, 0); + + if (end_addr != start_addr) + acpi_add_table(rsdp, (void *)start_addr); + + return end_addr; +} + static void mainboard_enable(device_t dev) { dev->ops->init = mainboard_init; dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; + dev->ops->write_acpi_tables = mainboard_write_acpi_tables; } struct chip_operations mainboard_ops = { -- cgit v1.2.3