From 4f012694dd3a04fa1166f33656595951eda107b2 Mon Sep 17 00:00:00 2001 From: Wim Vervoorn Date: Fri, 13 Mar 2020 15:20:13 +0100 Subject: mb/facebook/monolith: Configure COMB to 0x3e8 The 2nd COM port's base address defaults to 0x2f8. Current software for this system expects the port at 0x3e8. Configure COMB to use 0x3e8 instead of 0x2f8. BUG=N/A TEST=tested on facebook monolith Change-Id: Ibb462bad5f0594e0b5c8dea6e02cd42d58d999ab Signed-off-by: Wim Vervoorn Reviewed-on: https://review.coreboot.org/c/coreboot/+/39499 Tested-by: build bot (Jenkins) Reviewed-by: Frans Hendriks Reviewed-by: Angel Pons --- src/mainboard/facebook/monolith/Kconfig | 1 - src/mainboard/facebook/monolith/acpi/superio.asl | 4 ++-- src/mainboard/facebook/monolith/com_init.c | 3 +++ src/mainboard/facebook/monolith/devicetree.cb | 6 ++++++ 4 files changed, 11 insertions(+), 3 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/facebook/monolith/Kconfig b/src/mainboard/facebook/monolith/Kconfig index b6c9f1939c..b4b6370ae5 100644 --- a/src/mainboard/facebook/monolith/Kconfig +++ b/src/mainboard/facebook/monolith/Kconfig @@ -11,7 +11,6 @@ config BOARD_SPECIFIC_OPTIONS select MAINBOARD_HAS_TPM2 select MAINBOARD_USES_IFD_GBE_REGION select INTEL_GMA_HAVE_VBT - select SOC_INTEL_COMMON_BLOCK_LPC_COMB_ENABLE select VPD config CBFS_SIZE diff --git a/src/mainboard/facebook/monolith/acpi/superio.asl b/src/mainboard/facebook/monolith/acpi/superio.asl index a7763b91e0..54d450e710 100644 --- a/src/mainboard/facebook/monolith/acpi/superio.asl +++ b/src/mainboard/facebook/monolith/acpi/superio.asl @@ -52,14 +52,14 @@ Device (COM2) { Name (_CRS, ResourceTemplate () { - FixedIO (0x02F8, 0x08) + FixedIO (0x03E8, 0x08) IRQNoFlags () {3} }) Name (_PRS, ResourceTemplate () { StartDependentFn (0, 0) { - FixedIO (0x02F8, 0x08) + FixedIO (0x03E8, 0x08) IRQNoFlags () {3} } EndDependentFn () diff --git a/src/mainboard/facebook/monolith/com_init.c b/src/mainboard/facebook/monolith/com_init.c index a7ad263bc3..3438a4d471 100644 --- a/src/mainboard/facebook/monolith/com_init.c +++ b/src/mainboard/facebook/monolith/com_init.c @@ -14,6 +14,7 @@ #include #include +#include #include "onboard.h" #define SERIAL_DEV1 PNP_DEV(ITE8528_CMD_PORT, 1) /* ITE8528 UART1 */ @@ -25,5 +26,7 @@ void bootblock_mainboard_early_init(void) pnp_set_logical_device(SERIAL_DEV1); pnp_set_enable(SERIAL_DEV1, 1); pnp_set_logical_device(SERIAL_DEV2); + pnp_set_iobase(SERIAL_DEV2, PNP_IDX_IO0, 0x3e8); + pnp_set_irq(SERIAL_DEV2, PNP_IDX_IRQ0, 3); pnp_set_enable(SERIAL_DEV2, 1); } diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb index e9fa2a143c..e65fe3cfc2 100644 --- a/src/mainboard/facebook/monolith/devicetree.cb +++ b/src/mainboard/facebook/monolith/devicetree.cb @@ -12,6 +12,12 @@ chip soc/intel/skylake register "gpe0_dw1" = "GPP_D" register "gpe0_dw2" = "GPP_E" + # Set the fixed lpc ranges + # enable COMA at 3f8 and COMB at 3e8 (instead of the default 2f8) + # enable the embedded controller + register "lpc_iod" = "0x0070" + register "lpc_ioe" = "LPC_IOE_COMA_EN | LPC_IOE_COMB_EN | LPC_IOE_EC_62_66" + # CPLD host command ranges are in 0x280-0x2BF # EC PNP registers are at 0x6e and 0x6f register "gen1_dec" = "0x003c0281" -- cgit v1.2.3