From 478d47f7772a888e80e4e7381c4d4dfa8e861038 Mon Sep 17 00:00:00 2001 From: Brandon Breitenstein Date: Tue, 19 May 2020 13:57:24 -0700 Subject: mb/intel/tglrvp: Enable PCIEXP_HOTPLUG for TCSS TBT/USB4 This change enables PCIEXP_HOTPLUG to support resource allocation for TCSS TBT/USB4. BUG=b:149186922 Change-Id: Id3066204c8a780ade251c7be4052a60a861e43db Signed-off-by: Brandon Breitenstein Reviewed-on: https://review.coreboot.org/c/coreboot/+/41543 Tested-by: build bot (Jenkins) Reviewed-by: Wonkyu Kim --- src/mainboard/intel/tglrvp/Kconfig | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'src/mainboard') diff --git a/src/mainboard/intel/tglrvp/Kconfig b/src/mainboard/intel/tglrvp/Kconfig index 8277875e33..867c88eb14 100644 --- a/src/mainboard/intel/tglrvp/Kconfig +++ b/src/mainboard/intel/tglrvp/Kconfig @@ -17,6 +17,7 @@ config BOARD_SPECIFIC_OPTIONS select INTEL_LPSS_UART_FOR_CONSOLE select DRIVERS_INTEL_ISH select EC_ACPI + select PCIEXP_HOTPLUG config CHROMEOS bool @@ -55,6 +56,18 @@ config MAX_CPUS int default 8 +config PCIEXP_HOTPLUG_BUSES + int + default 42 + +config PCIEXP_HOTPLUG_MEM + hex + default 0xc200000 # 194 MiB + +config PCIEXP_HOTPLUG_PREFETCH_MEM + hex + default 0x1c00000 # 448 MiB + config DEVICETREE string default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb" -- cgit v1.2.3