From 46379c74ad829863a616e0d35aeea9c7fd344c33 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 4 Mar 2017 07:50:38 +0200 Subject: amd/parmer: Switch away from AGESA_LEGACY MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I3730bf87030b7e20991e1de00d2024e4b02f4c19 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/20718 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/amd/parmer/BiosCallOuts.c | 50 +++++---------------- src/mainboard/amd/parmer/Kconfig | 1 - src/mainboard/amd/parmer/OemCustomize.c | 35 ++++++++------- src/mainboard/amd/parmer/mainboard.c | 6 +-- src/mainboard/amd/parmer/romstage.c | 77 +++------------------------------ 5 files changed, 38 insertions(+), 131 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/amd/parmer/BiosCallOuts.c b/src/mainboard/amd/parmer/BiosCallOuts.c index c83e3184ec..21a32de1d0 100644 --- a/src/mainboard/amd/parmer/BiosCallOuts.c +++ b/src/mainboard/amd/parmer/BiosCallOuts.c @@ -16,6 +16,7 @@ #include "AGESA.h" #include "amdlib.h" #include +#include #include "Ids.h" #include "heapManager.h" #include "FchPlatform.h" @@ -25,8 +26,6 @@ #endif #include -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr); - const BIOS_CALLOUT_STRUCT BiosCallouts[] = { {AGESA_DO_RESET, agesa_Reset }, @@ -36,7 +35,6 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData }, {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess }, - {AGESA_FCH_OEM_CALLOUT, Fch_Oem_config }, {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage } }; const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); @@ -177,41 +175,15 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams) #endif /* CONFIG_HUDSON_IMC_FWM */ } -/** - * Fch Oem setting callback - * - * Configure platform specific Hudson device, - * such Azalia, SATA, IMC etc. - */ -static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr) +void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_reset) { - AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; - - if (StdHeader->Func == AMD_INIT_RESET) { - FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData; - printk(BIOS_DEBUG, "Fch OEM config in INIT RESET "); - //FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */ - FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE); - FchParams_reset->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); - FchParams_reset->FchReset.Xhci1Enable = FALSE; - } else if (StdHeader->Func == AMD_INIT_ENV) { - FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData; - printk(BIOS_DEBUG, "Fch OEM config in INIT ENV "); - - /* Azalia Controller OEM Codec Table Pointer */ - FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&CodecTableList[0]); - /* Azalia Controller Front Panel OEM Table Pointer */ - - /* Fan Control */ - oem_fan_control(FchParams_env); - - /* XHCI configuration */ - FchParams_env->Usb.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); - FchParams_env->Usb.Xhci1Enable = FALSE; - - /* sata configuration */ - } - printk(BIOS_DEBUG, "Done\n"); - - return AGESA_SUCCESS; + FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE); +} + +void board_FCH_InitEnv(struct sysinfo *cb_NA, FCH_DATA_BLOCK *FchParams_env) +{ + /* Azalia Controller OEM Codec Table Pointer */ + FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&CodecTableList[0]); + + oem_fan_control(FchParams_env); } diff --git a/src/mainboard/amd/parmer/Kconfig b/src/mainboard/amd/parmer/Kconfig index e02664ea27..aecf065571 100644 --- a/src/mainboard/amd/parmer/Kconfig +++ b/src/mainboard/amd/parmer/Kconfig @@ -17,7 +17,6 @@ if BOARD_AMD_PARMER config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select AGESA_LEGACY select CPU_AMD_AGESA_FAMILY15_TN select NORTHBRIDGE_AMD_AGESA_FAMILY15_TN select SOUTHBRIDGE_AMD_AGESA_HUDSON diff --git a/src/mainboard/amd/parmer/OemCustomize.c b/src/mainboard/amd/parmer/OemCustomize.c index fb6177a0f0..c16e6d96bb 100644 --- a/src/mainboard/amd/parmer/OemCustomize.c +++ b/src/mainboard/amd/parmer/OemCustomize.c @@ -20,7 +20,7 @@ #include #include "Filecode.h" -#include +#include #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE @@ -141,6 +141,13 @@ static const PCIe_DDI_DESCRIPTOR DdiList [] = { }, }; +void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset) +{ + FCH_RESET_INTERFACE *FchReset = &Reset->FchInterface; + FchReset->Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); + FchReset->Xhci1Enable = FALSE; +} + /*---------------------------------------------------------------------------------------*/ /** * OemCustomizeInitEarly @@ -157,7 +164,7 @@ static const PCIe_DDI_DESCRIPTOR DdiList [] = { **/ /*---------------------------------------------------------------------------------------*/ -static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly) +void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly) { AGESA_STATUS Status; PCIe_COMPLEX_DESCRIPTOR *PcieComplexListPtr; @@ -189,14 +196,6 @@ static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly) PcieComplexListPtr->DdiLinkList = DdiList; InitEarly->GnbConfig.PcieComplexList = PcieComplexListPtr; - return AGESA_SUCCESS; -} - -static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid) -{ - /* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */ - InitMid->GnbMidConfiguration.iGpuVgaMode = 0; - return AGESA_SUCCESS; } /*---------------------------------------------------------------------------------------- @@ -210,7 +209,7 @@ static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid) * is populated, AGESA will base its settings on the data from the table. Otherwise, it will * use its default conservative settings. */ -CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { +static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = { NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 1), NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2), MEMCLK_DIS_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), @@ -221,7 +220,13 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { PSO_END }; -const struct OEM_HOOK OemCustomize = { - .InitEarly = OemInitEarly, - .InitMid = OemInitMid, -}; +void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost) +{ + InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable; +} + +void board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *InitMid) +{ + /* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */ + InitMid->GnbMidConfiguration.iGpuVgaMode = 0; +} diff --git a/src/mainboard/amd/parmer/mainboard.c b/src/mainboard/amd/parmer/mainboard.c index e3021fbdaf..1e471bc2c2 100644 --- a/src/mainboard/amd/parmer/mainboard.c +++ b/src/mainboard/amd/parmer/mainboard.c @@ -22,7 +22,8 @@ #include #include #include -#include +#include +#include /************************************************* * enable the dedicated function in parmer board. @@ -30,9 +31,6 @@ static void mainboard_enable(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); - - if (acpi_is_wakeup_s3()) - agesawrapper_fchs3earlyrestore(); } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/amd/parmer/romstage.c b/src/mainboard/amd/parmer/romstage.c index 70747044f4..1736d48bc2 100644 --- a/src/mainboard/amd/parmer/romstage.c +++ b/src/mainboard/amd/parmer/romstage.c @@ -13,84 +13,17 @@ * GNU General Public License for more details. */ -#include -#include -#include -#include -#include #include -#include -#include #include -#include -#include -#include -#include -#include -#include -#include -#include +#include #include -#include -#include "cbmem.h" - -void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) +void board_BeforeAgesa(struct sysinfo *cb) { - u32 val; - - /* Must come first to enable PCI MMCONF. */ - amd_initmmio(); - - /* Set LPC decode enables. */ - pci_devfn_t dev = PCI_DEV(0, 0x14, 3); - pci_write_config32(dev, 0x44, 0xff03ffd5); - hudson_lpc_port80(); - if (!cpu_init_detectedx && boot_cpu()) { - post_code(0x30); - - post_code(0x31); - console_init(); - } - - /* Halt if there was a built in self test failure */ - post_code(0x34); - report_bist_failure(bist); - - /* Load MPB */ - val = cpuid_eax(1); - printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val); - printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx); - - post_code(0x37); - agesawrapper_amdinitreset(); - post_code(0x39); - - agesawrapper_amdinitearly(); - int s3resume = acpi_is_wakeup_s3(); - if (!s3resume) { - post_code(0x40); - agesawrapper_amdinitpost(); - post_code(0x41); - agesawrapper_amdinitenv(); - disable_cache_as_ram(); - } else { /* S3 detect */ - printk(BIOS_INFO, "S3 detected\n"); - - post_code(0x60); - agesawrapper_amdinitresume(); - - amd_initcpuio(); - agesawrapper_amds3laterestore(); - - post_code(0x61); - prepare_for_resume(); - } - - post_code(0x50); - copy_and_run(); + pci_devfn_t dev = PCI_DEV(0, 0x14, 3); - post_code(0x54); /* Should never see this post code. */ + /* For serial port option, plug-in card on LPC. */ + pci_write_config32(dev, 0x44, 0xff03ffd5); } -- cgit v1.2.3