From 3a1333da368068399cbb4348d8118af628ca9b0e Mon Sep 17 00:00:00 2001 From: Yu-Ping Wu Date: Thu, 6 Oct 2022 12:37:25 +0800 Subject: mb/google/corsola: Configure TPM IRQ as EDGE_FALLING When the GSC is ready for the next transaction, it triggers a GSC_AP_INT_ODL (active low) pulse with 100us duration to notify the AP. Currently the TPM IRQ is configured as EDGE_RISING. Changing it to EDGE_FALLING would speed up each register access by 100us. On Kingler, this saves 20ms for the boot time (0.93s -> 0.91s). BUG=b:235185547 TEST=emerge-corsola coreboot TEST=Kingler booted without TPM errors BRANCH=none Change-Id: Id282e0f35694bd151781845cbd5aa4b389a30ddc Signed-off-by: Yu-Ping Wu Reviewed-on: https://review.coreboot.org/c/coreboot/+/68327 Tested-by: build bot (Jenkins) Reviewed-by: Yidi Lin Reviewed-by: Hung-Te Lin --- src/mainboard/google/corsola/bootblock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/corsola/bootblock.c b/src/mainboard/google/corsola/bootblock.c index 87b972d59c..292f1b92e7 100644 --- a/src/mainboard/google/corsola/bootblock.c +++ b/src/mainboard/google/corsola/bootblock.c @@ -18,6 +18,6 @@ void bootblock_mainboard_init(void) mtk_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, SPI_PAD0_MASK, 1 * MHz, 0); mtk_snfc_init(SPI_NOR_GPIO_SET1); setup_chromeos_gpios(); - gpio_eint_configure(GPIO_GSC_AP_INT_ODL, IRQ_TYPE_EDGE_RISING); + gpio_eint_configure(GPIO_GSC_AP_INT_ODL, IRQ_TYPE_EDGE_FALLING); usb3_hub_reset(); } -- cgit v1.2.3