From 391562761527fc6de0144a97cca3d19b105a45cb Mon Sep 17 00:00:00 2001 From: V Sowmya Date: Tue, 30 Jun 2020 20:22:26 +0530 Subject: mb/google/dedede: Skip the CPU replacement check for dedede This patches enables the SkipCpuReplacementCheck config for the dedede baseboard to avoid the forced MRC training for all its variants with the soldered down SOC. BUG=b:160201335 TEST=Build and verify CSE Lite SKU on Waddledoo. Cq-Depend: chrome-internal:3142530 Change-Id: I611e66f74a3b9b090ab5e0d836231643d3f919dc Signed-off-by: V Sowmya Reviewed-on: https://review.coreboot.org/c/coreboot/+/42930 Tested-by: build bot (Jenkins) Reviewed-by: Karthik Ramasubramanian Reviewed-by: Rizwan Qureshi --- src/mainboard/google/dedede/variants/baseboard/devicetree.cb | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/mainboard') diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index e126129f11..7502489c06 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -163,6 +163,9 @@ chip soc/intel/jasperlake # register "common_soc_config." = "value" register "common_soc_config.chipset_lockdown" = CHIPSET_LOCKDOWN_COREBOOT + # Skip the CPU repalcement check + register "SkipCpuReplacementCheck" = "1" + device domain 0 on device pci 00.0 on end # Host Bridge device pci 02.0 on end # Integrated Graphics Device -- cgit v1.2.3