From 39124dd6c5f577861c16b947088ac1fd31169b8f Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Fri, 26 Nov 2010 22:42:41 +0000 Subject: Broadcom BCM5785: Add TINY_BOOTBLOCK support. In bcm5785_enable_rom(): Use PCI IDs from pci_ids.h instead of hardcoding, and use 'dev' instead of 'addr' as device_t variable name. Signed-off-by: Uwe Hermann Acked-by: Patrick Georgi git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6126 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/broadcom/blast/romstage.c | 2 -- src/mainboard/hp/dl145_g3/romstage.c | 2 -- src/mainboard/hp/dl165_g6_fam10/romstage.c | 2 -- src/mainboard/msi/ms9185/romstage.c | 2 -- 4 files changed, 8 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/broadcom/blast/romstage.c b/src/mainboard/broadcom/blast/romstage.c index b6cbc2f21c..e3791a79bf 100644 --- a/src/mainboard/broadcom/blast/romstage.c +++ b/src/mainboard/broadcom/blast/romstage.c @@ -10,7 +10,6 @@ #include #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/broadcom/bcm5785/bcm5785_early_smbus.c" -#include "southbridge/broadcom/bcm5785/bcm5785_enable_rom.c" #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" @@ -82,7 +81,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ enumerate_ht_chain(); - bcm5785_enable_rom(); bcm5785_enable_lpc(); pc87417_enable_dev(RTC_DEV); /* Enable RTC */ } diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c index ff16b3f8bb..eeac3e5b6a 100644 --- a/src/mainboard/hp/dl145_g3/romstage.c +++ b/src/mainboard/hp/dl145_g3/romstage.c @@ -41,7 +41,6 @@ #include #include #include "southbridge/broadcom/bcm5785/bcm5785_early_smbus.c" -#include "southbridge/broadcom/bcm5785/bcm5785_enable_rom.c" #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" @@ -145,7 +144,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ enumerate_ht_chain(); - bcm5785_enable_rom(); bcm5785_enable_lpc(); pc87417_enable_dev(RTC_DEV); /* Enable RTC */ } diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c index f167b925ac..ae9be8aeea 100644 --- a/src/mainboard/hp/dl165_g6_fam10/romstage.c +++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c @@ -40,7 +40,6 @@ #include #include #include "southbridge/broadcom/bcm5785/bcm5785_early_smbus.c" -#include "southbridge/broadcom/bcm5785/bcm5785_enable_rom.c" #include "northbridge/amd/amdfam10/raminit.h" #include "northbridge/amd/amdfam10/amdfam10.h" #include @@ -109,7 +108,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* mov bsp to bus 0xff when > 8 nodes */ set_bsp_node_CHtExtNodeCfgEn(); enumerate_ht_chain(); - bcm5785_enable_rom(); bcm5785_enable_lpc(); pc87417_enable_dev(RTC_DEV); /* Enable RTC */ } diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c index ffe728d3e5..a27fec0118 100644 --- a/src/mainboard/msi/ms9185/romstage.c +++ b/src/mainboard/msi/ms9185/romstage.c @@ -35,7 +35,6 @@ #include #include #include "southbridge/broadcom/bcm5785/bcm5785_early_smbus.c" -#include "southbridge/broadcom/bcm5785/bcm5785_enable_rom.c" #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" @@ -115,7 +114,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ enumerate_ht_chain(); - bcm5785_enable_rom(); bcm5785_enable_lpc(); //enable RTC pc87417_enable_dev(RTC_DEV); -- cgit v1.2.3