From 30f4c531acf9c92ca0b01074e65418c6f70f58e1 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Fri, 24 Dec 2021 02:09:45 +0100 Subject: mb/google/taniks,vell;mb/intel/adlrvp_n_ext_ec: fix build error MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit d448f8ce0fe9955e7792f54cc278897152d53590 (drivers/intel/pmc_mux/ conn: Change usb{23}_port_number fields to device pointers) changed the way the pmc_mux/conn driver gets the corresponding USB ports from the devicetree. This change didn't include the corresponding change for the Taniks and Vell variants of the Google Brya project and the Intel adlrvp_n_ext_ec board which probably weren't in the tree at the time the patch referenced above was created. This patch ports the needed change forward to those boards to fix the build of the upstream tree. TEST=None Signed-off-by: Felix Held Change-Id: Id295cd11fbbfe038534b154215a6de7c1ac13e0e Reviewed-on: https://review.coreboot.org/c/coreboot/+/60329 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Kyösti Mälkki Reviewed-by: Nico Huber --- src/mainboard/google/brya/variants/taniks/overridetree.cb | 8 ++++---- src/mainboard/google/brya/variants/vell/overridetree.cb | 8 ++++---- .../intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb | 12 ++++++------ 3 files changed, 14 insertions(+), 14 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/brya/variants/taniks/overridetree.cb b/src/mainboard/google/brya/variants/taniks/overridetree.cb index deb31ce09e..cb8c99a0c7 100644 --- a/src/mainboard/google/brya/variants/taniks/overridetree.cb +++ b/src/mainboard/google/brya/variants/taniks/overridetree.cb @@ -365,13 +365,13 @@ chip soc/intel/alderlake chip drivers/intel/pmc_mux device generic 0 on chip drivers/intel/pmc_mux/conn - register "usb2_port_number" = "1" - register "usb3_port_number" = "1" + use usb2_port1 as usb2_port + use tcss_usb3_port1 as usb3_port device generic 0 alias conn0 on end end chip drivers/intel/pmc_mux/conn - register "usb2_port_number" = "3" - register "usb3_port_number" = "3" + use usb2_port3 as usb2_port + use tcss_usb3_port3 as usb3_port device generic 2 alias conn1 on end end end diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb index 7595c6f099..4f5da7f7b1 100644 --- a/src/mainboard/google/brya/variants/vell/overridetree.cb +++ b/src/mainboard/google/brya/variants/vell/overridetree.cb @@ -253,13 +253,13 @@ chip soc/intel/alderlake chip drivers/intel/pmc_mux device generic 0 on chip drivers/intel/pmc_mux/conn - register "usb2_port_number" = "1" - register "usb3_port_number" = "1" + use usb2_port1 as usb2_port + use tcss_usb3_port1 as usb3_port device generic 0 alias conn0 on end end chip drivers/intel/pmc_mux/conn - register "usb2_port_number" = "3" - register "usb3_port_number" = "3" + use usb2_port3 as usb2_port + use tcss_usb3_port3 as usb3_port device generic 1 alias conn1 on end end end diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb index e78d00fa7f..de5471cf65 100644 --- a/src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb +++ b/src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb @@ -34,22 +34,22 @@ chip soc/intel/alderlake chip drivers/intel/pmc_mux device generic 0 on chip drivers/intel/pmc_mux/conn - register "usb2_port_number" = "1" - register "usb3_port_number" = "1" + use usb2_port1 as usb2_port + use tcss_usb3_port1 as usb3_port # SBU is fixed, HSL follows CC register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" device generic 0 alias conn0 on end end chip drivers/intel/pmc_mux/conn - register "usb2_port_number" = "2" - register "usb3_port_number" = "2" + use usb2_port2 as usb2_port + use tcss_usb3_port2 as usb3_port # SBU is fixed, HSL follows CC register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" device generic 1 alias conn1 on end end chip drivers/intel/pmc_mux/conn - register "usb2_port_number" = "3" - register "usb3_port_number" = "3" + use usb2_port3 as usb2_port + use tcss_usb3_port3 as usb3_port # SBU is fixed, HSL follows CC register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" device generic 2 alias conn2 on end -- cgit v1.2.3