From 2d696516fdf8ef13a8c352a46dd9b9a27ba6d0cc Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Tue, 17 Jan 2023 21:37:51 +0000 Subject: mb/starlabs/starbook/{tgl,adl}: Set DmiMaxLinkSpeed to 4 Set DmiMaxLinkSpeed to 4 in FSP to ensure that FSP always supports PCIe Gen 4 drives. Signed-off-by: Sean Rhodes Change-Id: I0e31919122dacfbdc2486fa8216a28b479f3bd00 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72012 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/mainboard/starlabs/starbook/variants/adl/romstage.c | 2 ++ src/mainboard/starlabs/starbook/variants/tgl/romstage.c | 1 + 2 files changed, 3 insertions(+) (limited to 'src/mainboard') diff --git a/src/mainboard/starlabs/starbook/variants/adl/romstage.c b/src/mainboard/starlabs/starbook/variants/adl/romstage.c index 29beea39d1..17629b460d 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/romstage.c +++ b/src/mainboard/starlabs/starbook/variants/adl/romstage.c @@ -33,4 +33,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) /* Enable/Disable Wireless (RP05) based on CMOS settings */ if (get_uint_option("wireless", 1) == 0) mupd->FspmConfig.PcieRpEnableMask &= ~(1 << 4); + + mupd->FspmConfig.DmiMaxLinkSpeed = 4; }; diff --git a/src/mainboard/starlabs/starbook/variants/tgl/romstage.c b/src/mainboard/starlabs/starbook/variants/tgl/romstage.c index 41e7f6dc4d..ceeb754813 100644 --- a/src/mainboard/starlabs/starbook/variants/tgl/romstage.c +++ b/src/mainboard/starlabs/starbook/variants/tgl/romstage.c @@ -37,4 +37,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) mupd->FspmConfig.TcssDma0En = 0; mupd->FspmConfig.TcssItbtPcie0En = 0; } + mupd->FspmConfig.DmiMaxLinkSpeed = 4; }; -- cgit v1.2.3