From 2919a85be872d80d499de2c3f3421ccf83c68fd3 Mon Sep 17 00:00:00 2001 From: Jarried Lin Date: Fri, 8 Nov 2024 20:10:48 +0800 Subject: mb/google/rauru: Enlarge RW_MRC_CACHE from 8K to 16K Rauru has MT8196 SoC. Following previous MediaTek SoCs, MT8196 will enable CACHE_MRC_SETTINGS, in order to store the DRAM parameters in the FMAP section RW_MRC_CACHE. As the size of the MT8196 parameters is larger (15968 bytes) compared to previous SoCs (7616 bytes), enlarge RW_MRC_CACHE from 8K to 16K. TEST=Build pass BUG=b:317009620 Change-Id: I35aad5a3a82686a68dd66e993355aa32cc19043e Signed-off-by: Jarried Lin Reviewed-on: https://review.coreboot.org/c/coreboot/+/85094 Reviewed-by: Yu-Ping Wu Reviewed-by: Hung-Te Lin Tested-by: build bot (Jenkins) Reviewed-by: Yidi Lin --- src/mainboard/google/rauru/chromeos.fmd | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/rauru/chromeos.fmd b/src/mainboard/google/rauru/chromeos.fmd index 5b2234d39e..a1595df6f4 100644 --- a/src/mainboard/google/rauru/chromeos.fmd +++ b/src/mainboard/google/rauru/chromeos.fmd @@ -28,9 +28,9 @@ FLASH@0x0 8M { RW_FWID_A 0x100 } RW_MISC 36K { - RW_VPD(PRESERVE) 16K # At least 8K. + RW_VPD(PRESERVE) 8K # At least 8K. RW_NVRAM(PRESERVE) 8K - RW_MRC_CACHE(PRESERVE) 8K + RW_MRC_CACHE(PRESERVE) 16K RW_ELOG(PRESERVE) 4K # ELOG driver hard-coded size in 4K. } RW_SECTION_B 1500K { -- cgit v1.2.3