From 2007792b0833eaefd5c72a3730d0e0ef1d673ad2 Mon Sep 17 00:00:00 2001 From: Nicholas Chin Date: Sat, 5 Oct 2024 21:59:07 -0600 Subject: mb/purism/librem_l1um_v2/ramstage.c: Use DEV_PTR macro Use the DEV_PTR macro to resolve devicetree aliases instead of using the autogenerated reference names from sconfig directly. TEST=Timeless build did not change Change-Id: I4ff06bb3a8256d5fe215cab659f33ec404264e21 Signed-off-by: Nicholas Chin Reviewed-on: https://review.coreboot.org/c/coreboot/+/85093 Reviewed-by: Jonathon Hall Tested-by: build bot (Jenkins) Reviewed-by: Felix Singer --- src/mainboard/purism/librem_l1um_v2/ramstage.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/purism/librem_l1um_v2/ramstage.c b/src/mainboard/purism/librem_l1um_v2/ramstage.c index 87b7822126..39c078cf33 100644 --- a/src/mainboard/purism/librem_l1um_v2/ramstage.c +++ b/src/mainboard/purism/librem_l1um_v2/ramstage.c @@ -26,13 +26,13 @@ static void mainboard_final(void *chip_info) * Control Register), but we have to use one of the LDNs as the device * because the chip ops are only assigned to the LDNs. */ - pnp_enter_conf_mode(_dev_nvt_superio_gpio1_ptr); + pnp_enter_conf_mode(DEV_PTR(nvt_superio_gpio1)); printk(BIOS_DEBUG, "GCR 0x2f was: %02X\n", - pnp_read_config(_dev_nvt_superio_gpio1_ptr, 0x2f)); - pnp_write_config(_dev_nvt_superio_gpio1_ptr, 0x2f, 0x00); + pnp_read_config(DEV_PTR(nvt_superio_gpio1), 0x2f)); + pnp_write_config(DEV_PTR(nvt_superio_gpio1), 0x2f, 0x00); printk(BIOS_DEBUG, "GCR 0x2f is now: %02X\n", - pnp_read_config(_dev_nvt_superio_gpio1_ptr, 0x2f)); - pnp_exit_conf_mode(_dev_nvt_superio_gpio1_ptr); + pnp_read_config(DEV_PTR(nvt_superio_gpio1), 0x2f)); + pnp_exit_conf_mode(DEV_PTR(nvt_superio_gpio1)); } struct chip_operations mainboard_ops = { -- cgit v1.2.3