From 1f5a221a51c357e809cb2bbf6bee17bb5902a7ef Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Fri, 28 Jun 2024 00:15:22 +0200 Subject: tgl mainboards: Move audio related settings into hda device scope Change-Id: I1992c20dcdc5e974143690d44ee199d7c3394cfd Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/83251 Tested-by: build bot (Jenkins) Reviewed-by: Elyes Haouas --- .../google/volteer/variants/baseboard/devicetree.cb | 5 ++--- .../intel/tglrvp/variants/tglrvp_up3/devicetree.cb | 21 ++++++++++++--------- .../intel/tglrvp/variants/tglrvp_up4/devicetree.cb | 21 ++++++++++++--------- 3 files changed, 26 insertions(+), 21 deletions(-) (limited to 'src/mainboard') diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index df13fef43c..4775b0fac5 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -192,9 +192,6 @@ chip soc/intel/tigerlake # - PM_CFG.SLP_LAN_MIN_ASST_WDTH register "PchPmPwrCycDur" = "1" # 1s - # HD Audio - register "PchHdaDspEnable" = "1" - # TCSS USB3 register "UsbTcPortEn" = "0x3" register "TcssXhciEn" = "1" @@ -513,6 +510,8 @@ chip soc/intel/tigerlake end end device ref hda on + register "PchHdaDspEnable" = "1" + chip drivers/sof register "spkr_tplg" = "max98373" register "jack_tplg" = "rt5682" diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb index af16f756f0..fede521d22 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb @@ -104,14 +104,6 @@ chip soc/intel/tigerlake .tdp_pl4 = 105, }" - #HD Audio - register "PchHdaDspEnable" = "1" - register "PchHdaAudioLinkDmicEnable[0]" = "1" - register "PchHdaAudioLinkDmicEnable[1]" = "1" - register "PchHdaAudioLinkSspEnable[0]" = "1" - register "PchHdaAudioLinkSspEnable[2]" = "1" - register "PchHdaAudioLinkSndwEnable[0]" = "1" - # Intel Common SoC Config register "common_soc_config" = "{ .gspi[1] = { @@ -332,7 +324,18 @@ chip soc/intel/tigerlake end end end - device ref hda on end + device ref hda on + register "PchHdaDspEnable" = "1" + register "PchHdaAudioLinkDmicEnable" = "{ + [0] = 1, + [1] = 1, + }" + register "PchHdaAudioLinkSspEnable" = "{ + [0] = 1, + [2] = 1, + }" + register "PchHdaAudioLinkSndwEnable[0]" = "1" + end device ref smbus on end device ref fast_spi on end device ref gbe off end diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb index 3a80c51d9b..23ccfb96af 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb @@ -111,14 +111,6 @@ chip soc/intel/tigerlake .tdp_pl4 = 83, }" - #HD Audio - register "PchHdaDspEnable" = "1" - register "PchHdaAudioLinkDmicEnable[0]" = "1" - register "PchHdaAudioLinkDmicEnable[1]" = "1" - register "PchHdaAudioLinkSspEnable[0]" = "1" - register "PchHdaAudioLinkSspEnable[2]" = "1" - register "PchHdaAudioLinkSndwEnable[0]" = "1" - # Intel Common SoC Config register "common_soc_config" = "{ .gspi[1] = { @@ -337,7 +329,18 @@ chip soc/intel/tigerlake end end end - device ref hda on end + device ref hda on + register "PchHdaDspEnable" = "1" + register "PchHdaAudioLinkDmicEnable" = "{ + [0] = 1, + [1] = 1, + }" + register "PchHdaAudioLinkSspEnable" = "{ + [0] = 1, + [2] = 1, + }" + register "PchHdaAudioLinkSndwEnable[0]" = "1" + end device ref smbus on end device ref fast_spi on end device ref gbe off end -- cgit v1.2.3