From 1b3197efb40a19353f26ca565ed81248e3db43e1 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Sun, 22 May 2022 03:20:46 +0200 Subject: mb/lenovo: Rename t440p to haswell MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In preparation to follow-up commits, rename the mainboard folder from t440p to haswell, which will have more variants later. Change-Id: I4a9d68d54d5f0821bbf85faaa620855d456c97f3 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/63511 Tested-by: build bot (Jenkins) Reviewed-by: Peter Lemenkov Reviewed-by: Michael Niewöhner --- src/mainboard/lenovo/haswell/Kconfig | 73 +++++++ src/mainboard/lenovo/haswell/Kconfig.name | 2 + src/mainboard/lenovo/haswell/Makefile.inc | 2 + src/mainboard/lenovo/haswell/acpi/ec.asl | 4 + src/mainboard/lenovo/haswell/acpi/platform.asl | 14 ++ src/mainboard/lenovo/haswell/acpi/superio.asl | 3 + src/mainboard/lenovo/haswell/acpi_tables.c | 15 ++ src/mainboard/lenovo/haswell/board_info.txt | 7 + src/mainboard/lenovo/haswell/cmos.default | 14 ++ src/mainboard/lenovo/haswell/cmos.layout | 83 ++++++++ src/mainboard/lenovo/haswell/data.vbt | Bin 0 -> 4608 bytes src/mainboard/lenovo/haswell/devicetree.cb | 99 ++++++++++ src/mainboard/lenovo/haswell/dsdt.asl | 31 +++ src/mainboard/lenovo/haswell/gma-mainboard.ads | 18 ++ src/mainboard/lenovo/haswell/gpio.c | 209 +++++++++++++++++++++ src/mainboard/lenovo/haswell/hda_verb.c | 46 +++++ src/mainboard/lenovo/haswell/mainboard.c | 16 ++ src/mainboard/lenovo/haswell/romstage.c | 69 +++++++ src/mainboard/lenovo/haswell/smihandler.c | 85 +++++++++ src/mainboard/lenovo/haswell/vboot-ro-me_clean.fmd | 21 +++ src/mainboard/lenovo/haswell/vboot-ro.fmd | 21 +++ src/mainboard/lenovo/haswell/vboot-rwab.fmd | 34 ++++ src/mainboard/lenovo/t440p/Kconfig | 73 ------- src/mainboard/lenovo/t440p/Kconfig.name | 2 - src/mainboard/lenovo/t440p/Makefile.inc | 2 - src/mainboard/lenovo/t440p/acpi/ec.asl | 4 - src/mainboard/lenovo/t440p/acpi/platform.asl | 14 -- src/mainboard/lenovo/t440p/acpi/superio.asl | 3 - src/mainboard/lenovo/t440p/acpi_tables.c | 15 -- src/mainboard/lenovo/t440p/board_info.txt | 7 - src/mainboard/lenovo/t440p/cmos.default | 14 -- src/mainboard/lenovo/t440p/cmos.layout | 83 -------- src/mainboard/lenovo/t440p/data.vbt | Bin 4608 -> 0 bytes src/mainboard/lenovo/t440p/devicetree.cb | 99 ---------- src/mainboard/lenovo/t440p/dsdt.asl | 31 --- src/mainboard/lenovo/t440p/gma-mainboard.ads | 18 -- src/mainboard/lenovo/t440p/gpio.c | 209 --------------------- src/mainboard/lenovo/t440p/hda_verb.c | 46 ----- src/mainboard/lenovo/t440p/mainboard.c | 16 -- src/mainboard/lenovo/t440p/romstage.c | 69 ------- src/mainboard/lenovo/t440p/smihandler.c | 85 --------- src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd | 21 --- src/mainboard/lenovo/t440p/vboot-ro.fmd | 21 --- src/mainboard/lenovo/t440p/vboot-rwab.fmd | 34 ---- 44 files changed, 866 insertions(+), 866 deletions(-) create mode 100644 src/mainboard/lenovo/haswell/Kconfig create mode 100644 src/mainboard/lenovo/haswell/Kconfig.name create mode 100644 src/mainboard/lenovo/haswell/Makefile.inc create mode 100644 src/mainboard/lenovo/haswell/acpi/ec.asl create mode 100644 src/mainboard/lenovo/haswell/acpi/platform.asl create mode 100644 src/mainboard/lenovo/haswell/acpi/superio.asl create mode 100644 src/mainboard/lenovo/haswell/acpi_tables.c create mode 100644 src/mainboard/lenovo/haswell/board_info.txt create mode 100644 src/mainboard/lenovo/haswell/cmos.default create mode 100644 src/mainboard/lenovo/haswell/cmos.layout create mode 100644 src/mainboard/lenovo/haswell/data.vbt create mode 100644 src/mainboard/lenovo/haswell/devicetree.cb create mode 100644 src/mainboard/lenovo/haswell/dsdt.asl create mode 100644 src/mainboard/lenovo/haswell/gma-mainboard.ads create mode 100644 src/mainboard/lenovo/haswell/gpio.c create mode 100644 src/mainboard/lenovo/haswell/hda_verb.c create mode 100644 src/mainboard/lenovo/haswell/mainboard.c create mode 100644 src/mainboard/lenovo/haswell/romstage.c create mode 100644 src/mainboard/lenovo/haswell/smihandler.c create mode 100644 src/mainboard/lenovo/haswell/vboot-ro-me_clean.fmd create mode 100644 src/mainboard/lenovo/haswell/vboot-ro.fmd create mode 100644 src/mainboard/lenovo/haswell/vboot-rwab.fmd delete mode 100644 src/mainboard/lenovo/t440p/Kconfig delete mode 100644 src/mainboard/lenovo/t440p/Kconfig.name delete mode 100644 src/mainboard/lenovo/t440p/Makefile.inc delete mode 100644 src/mainboard/lenovo/t440p/acpi/ec.asl delete mode 100644 src/mainboard/lenovo/t440p/acpi/platform.asl delete mode 100644 src/mainboard/lenovo/t440p/acpi/superio.asl delete mode 100644 src/mainboard/lenovo/t440p/acpi_tables.c delete mode 100644 src/mainboard/lenovo/t440p/board_info.txt delete mode 100644 src/mainboard/lenovo/t440p/cmos.default delete mode 100644 src/mainboard/lenovo/t440p/cmos.layout delete mode 100644 src/mainboard/lenovo/t440p/data.vbt delete mode 100644 src/mainboard/lenovo/t440p/devicetree.cb delete mode 100644 src/mainboard/lenovo/t440p/dsdt.asl delete mode 100644 src/mainboard/lenovo/t440p/gma-mainboard.ads delete mode 100644 src/mainboard/lenovo/t440p/gpio.c delete mode 100644 src/mainboard/lenovo/t440p/hda_verb.c delete mode 100644 src/mainboard/lenovo/t440p/mainboard.c delete mode 100644 src/mainboard/lenovo/t440p/romstage.c delete mode 100644 src/mainboard/lenovo/t440p/smihandler.c delete mode 100644 src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd delete mode 100644 src/mainboard/lenovo/t440p/vboot-ro.fmd delete mode 100644 src/mainboard/lenovo/t440p/vboot-rwab.fmd (limited to 'src/mainboard') diff --git a/src/mainboard/lenovo/haswell/Kconfig b/src/mainboard/lenovo/haswell/Kconfig new file mode 100644 index 0000000000..48b1103b3c --- /dev/null +++ b/src/mainboard/lenovo/haswell/Kconfig @@ -0,0 +1,73 @@ +if BOARD_LENOVO_THINKPAD_T440P + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select BOARD_ROMSIZE_KB_12288 + select EC_LENOVO_H8 + select EC_LENOVO_PMH7 + select H8_HAS_BAT_THRESHOLDS_IMPL + select H8_HAS_PRIMARY_FN_KEYS + select HAVE_ACPI_RESUME + select HAVE_ACPI_TABLES + select HAVE_CMOS_DEFAULT + select HAVE_OPTION_TABLE + select MEMORY_MAPPED_TPM + select MAINBOARD_HAS_TPM1 + select INTEL_GMA_HAVE_VBT + select INTEL_INT15 + select MAINBOARD_HAS_LIBGFXINIT + select MAINBOARD_HAS_TPM1 + select MAINBOARD_USES_IFD_GBE_REGION + select MEMORY_MAPPED_TPM + select NO_UART_ON_SUPERIO + select NORTHBRIDGE_INTEL_HASWELL + select SERIRQ_CONTINUOUS_MODE + select SOUTHBRIDGE_INTEL_LYNXPOINT + select SYSTEM_TYPE_LAPTOP + +config VBOOT + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_FWMP + select GBB_FLAG_DISABLE_LID_SHUTDOWN + select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC + select HAS_RECOVERY_MRC_CACHE + select VBOOT_VBNV_CMOS + +config VBOOT_SLOTS_RW_AB + default y + +config VBOOT_VBNV_OFFSET + hex + default 0x2a + +config FMDFILE + default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/vboot-rwab.fmd" if VBOOT + +config MAINBOARD_DIR + default "lenovo/haswell" + +config MAINBOARD_PART_NUMBER + default "ThinkPad T440p" + +config VGA_BIOS_ID + string + default "8086,0416" + +config USBDEBUG_HCD_INDEX + int + default 2 + +config DRIVER_LENOVO_SERIALS + bool + default n + +config PS2K_EISAID + default "LEN0071" + +config PS2M_EISAID + default "LEN0036" + +config THINKPADEC_HKEY_EISAID + default "LEN0068" + +endif diff --git a/src/mainboard/lenovo/haswell/Kconfig.name b/src/mainboard/lenovo/haswell/Kconfig.name new file mode 100644 index 0000000000..e90299d930 --- /dev/null +++ b/src/mainboard/lenovo/haswell/Kconfig.name @@ -0,0 +1,2 @@ +config BOARD_LENOVO_THINKPAD_T440P + bool "ThinkPad T440p" diff --git a/src/mainboard/lenovo/haswell/Makefile.inc b/src/mainboard/lenovo/haswell/Makefile.inc new file mode 100644 index 0000000000..ebe01aea99 --- /dev/null +++ b/src/mainboard/lenovo/haswell/Makefile.inc @@ -0,0 +1,2 @@ +romstage-y += gpio.c +ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads diff --git a/src/mainboard/lenovo/haswell/acpi/ec.asl b/src/mainboard/lenovo/haswell/acpi/ec.asl new file mode 100644 index 0000000000..8dea152079 --- /dev/null +++ b/src/mainboard/lenovo/haswell/acpi/ec.asl @@ -0,0 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include diff --git a/src/mainboard/lenovo/haswell/acpi/platform.asl b/src/mainboard/lenovo/haswell/acpi/platform.asl new file mode 100644 index 0000000000..f5a4df75f4 --- /dev/null +++ b/src/mainboard/lenovo/haswell/acpi/platform.asl @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +Method(_WAK,1) +{ + /* ME may not be up yet. */ + \_TZ.MEB1 = 0 + \_TZ.MEB2 = 0 + Return(Package(){0,0}) +} + +Method(_PTS,1) +{ + \_SB.PCI0.LPCB.EC.RADI(0) +} diff --git a/src/mainboard/lenovo/haswell/acpi/superio.asl b/src/mainboard/lenovo/haswell/acpi/superio.asl new file mode 100644 index 0000000000..ee2eabeb75 --- /dev/null +++ b/src/mainboard/lenovo/haswell/acpi/superio.asl @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include diff --git a/src/mainboard/lenovo/haswell/acpi_tables.c b/src/mainboard/lenovo/haswell/acpi_tables.c new file mode 100644 index 0000000000..0301443f88 --- /dev/null +++ b/src/mainboard/lenovo/haswell/acpi_tables.c @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include + +void mainboard_fill_gnvs(struct global_nvs *gnvs) +{ + /* The lid is open by default. */ + gnvs->lids = 1; + + /* Temperature at which OS will shutdown. */ + gnvs->tcrt = 100; + /* Temperature at which OS will throttle CPU. */ + gnvs->tpsv = 90; +} diff --git a/src/mainboard/lenovo/haswell/board_info.txt b/src/mainboard/lenovo/haswell/board_info.txt new file mode 100644 index 0000000000..46461fe7da --- /dev/null +++ b/src/mainboard/lenovo/haswell/board_info.txt @@ -0,0 +1,7 @@ +Category: laptop +Board URL: https://pcsupport.lenovo.com/us/zh/products/laptops-and-netbooks/thinkpad-t-series-laptops/thinkpad-t440p +ROM package: SOIC-8 +ROM protocol: SPI +ROM socketed: n +Flashrom support: n +Release year: 2013 diff --git a/src/mainboard/lenovo/haswell/cmos.default b/src/mainboard/lenovo/haswell/cmos.default new file mode 100644 index 0000000000..bb8626d48b --- /dev/null +++ b/src/mainboard/lenovo/haswell/cmos.default @@ -0,0 +1,14 @@ +boot_option=Fallback +debug_level=Debug +power_on_after_fail=Disable +nmi=Enable +volume=0x3 +first_battery=Primary +wlan=Enable +fn_ctrl_swap=Disable +f1_to_f12_as_primary=Enable +sticky_fn=Disable +trackpoint=Enable +backlight=Keyboard +enable_dual_graphics=Disable +usb_always_on=Disable diff --git a/src/mainboard/lenovo/haswell/cmos.layout b/src/mainboard/lenovo/haswell/cmos.layout new file mode 100644 index 0000000000..464d24277b --- /dev/null +++ b/src/mainboard/lenovo/haswell/cmos.layout @@ -0,0 +1,83 @@ +## SPDX-License-Identifier: GPL-2.0-only + +# ----------------------------------------------------------------- +entries + +# ----------------------------------------------------------------- +0 120 r 0 reserved_memory + +# ----------------------------------------------------------------- +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 4 boot_option +388 4 h 0 reboot_counter + +# ----------------------------------------------------------------- +# coreboot config options: console +395 4 e 6 debug_level + +#400 8 r 0 reserved for century byte + +# coreboot config options: southbridge +408 1 e 1 nmi +409 2 e 7 power_on_after_fail + +# coreboot config options: EC +411 1 e 8 first_battery +415 1 e 1 wlan +416 1 e 1 trackpoint +417 1 e 1 fn_ctrl_swap +418 1 e 1 sticky_fn +419 2 e 13 usb_always_on +422 2 e 10 backlight +424 1 e 1 f1_to_f12_as_primary + +# coreboot config options: northbridge +435 1 e 1 enable_dual_graphics +440 8 h 0 volume + +# VBOOT +448 128 r 0 vbnv + +# coreboot config options: check sums +984 16 h 0 check_sum + +# ----------------------------------------------------------------- + +enumerations + +#ID value text +1 0 Disable +1 1 Enable +2 0 Enable +2 1 Disable +4 0 Fallback +4 1 Normal +6 0 Emergency +6 1 Alert +6 2 Critical +6 3 Error +6 4 Warning +6 5 Notice +6 6 Info +6 7 Debug +6 8 Spew +7 0 Disable +7 1 Enable +7 2 Keep +8 0 Secondary +8 1 Primary +9 0 AHCI +9 1 Compatible +# Haswell ThinkPads have no Thinklight +#10 0 Both +10 1 Keyboard +#10 2 Thinklight only +10 3 None +13 0 Disable +13 1 AC and battery +13 2 AC only + +# ----------------------------------------------------------------- +checksums + +checksum 392 447 984 diff --git a/src/mainboard/lenovo/haswell/data.vbt b/src/mainboard/lenovo/haswell/data.vbt new file mode 100644 index 0000000000..79077ccb0a Binary files /dev/null and b/src/mainboard/lenovo/haswell/data.vbt differ diff --git a/src/mainboard/lenovo/haswell/devicetree.cb b/src/mainboard/lenovo/haswell/devicetree.cb new file mode 100644 index 0000000000..b7588ea77d --- /dev/null +++ b/src/mainboard/lenovo/haswell/devicetree.cb @@ -0,0 +1,99 @@ +chip northbridge/intel/haswell + register "gfx" = "GMA_STATIC_DISPLAYS(0)" + register "gpu_ddi_e_connected" = "1" + register "gpu_dp_b_hotplug" = "4" + register "gpu_dp_c_hotplug" = "4" + register "gpu_dp_d_hotplug" = "4" + register "panel_cfg" = "{ + .up_delay_ms = 200, + .down_delay_ms = 50, + .cycle_delay_ms = 500, + .backlight_on_delay_ms = 1, + .backlight_off_delay_ms = 1, + .backlight_pwm_hz = 220, + }" + register "ec_present" = "true" + device cpu_cluster 0 on + chip cpu/intel/haswell + device lapic 0 on end + device lapic 0xacac off end + end + end + device domain 0 on + subsystemid 0x17aa 0x220e inherit + + device pci 00.0 on end # Host bridge + device pci 01.0 on end # PCIe Bridge for discrete graphics + device pci 01.1 off end # Unused PCIe Bridge + device pci 02.0 on end # Internal graphics VGA controller + device pci 03.0 on end # Mini-HD audio + + chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point PCH + register "gen1_dec" = "0x007c1601" + register "gen2_dec" = "0x000c15e1" + register "gen4_dec" = "0x000c06a1" + register "gpi13_routing" = "2" + register "gpi1_routing" = "2" + # 0(HDD), 1(M.2), 5(ODD) + register "sata_port_map" = "0x23" + device pci 14.0 on end # xHCI Controller + device pci 16.0 on end # Management Engine Interface 1 + device pci 16.1 off end # Management Engine Interface 2 + device pci 16.2 off end # Management Engine IDE-R + device pci 16.3 off end # Management Engine KT + device pci 19.0 on end # Intel Gigabit Ethernet + device pci 1a.0 on end # USB2 EHCI #2 + device pci 1b.0 on end # High Definition Audio Audio controller + device pci 1c.0 on end # PCIe Port #1, Realtek Card Reader + device pci 1c.1 on # PCIe Port #2, WLAN + smbios_slot_desc "0x14" "1" "M.2 2230" "8" + end + device pci 1c.2 off end # PCIe Port #3 + device pci 1c.3 off end # PCIe Port #4 + device pci 1c.4 off end # PCIe Port #5 + device pci 1c.5 off end # PCIe Port #6 + device pci 1c.6 off end # PCIe Port #7 + device pci 1c.7 off end # PCIe Port #8 + device pci 1d.0 on end # USB2 EHCI #1 + device pci 1f.0 on # LPC bridge + chip ec/lenovo/pmh7 + register "backlight_enable" = "0x01" + register "dock_event_enable" = "0x01" + device pnp ff.1 on end # dummy + end + chip ec/lenovo/h8 + register "beepmask0" = "0x00" + register "beepmask1" = "0x86" + register "config0" = "0xa6" + register "config1" = "0x0d" + register "config2" = "0xa8" + register "config3" = "0xc4" + register "has_keyboard_backlight" = "1" + register "event2_enable" = "0xff" + register "event3_enable" = "0xff" + register "event4_enable" = "0xd0" + register "event5_enable" = "0x3c" + register "event7_enable" = "0x01" + register "event8_enable" = "0x7b" + register "event9_enable" = "0xff" + register "eventc_enable" = "0xff" + register "eventd_enable" = "0xff" + register "evente_enable" = "0x9d" + device pnp ff.2 on # dummy + io 0x60 = 0x62 + io 0x62 = 0x66 + io 0x64 = 0x1600 + io 0x66 = 0x1604 + end + end + chip drivers/pc80/tpm + device pnp 0c31.0 on end + end + end + device pci 1f.2 on end # SATA Controller 1 + device pci 1f.3 on end # SMBus + device pci 1f.5 off end # SATA Controller 2 + device pci 1f.6 off end # Thermal + end + end +end diff --git a/src/mainboard/lenovo/haswell/dsdt.asl b/src/mainboard/lenovo/haswell/dsdt.asl new file mode 100644 index 0000000000..a7afeee766 --- /dev/null +++ b/src/mainboard/lenovo/haswell/dsdt.asl @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB +#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB +#define EC_LENOVO_H8_ME_WORKAROUND 1 +#define THINKPAD_EC_GPE 17 + +#include +DefinitionBlock( + "dsdt.aml", + "DSDT", + ACPI_DSDT_REV_2, + OEM_ID, + ACPI_TABLE_CREATOR, + 0x20141018 // OEM revision +) +{ + #include + #include "acpi/platform.asl" + #include + #include + #include + #include + + Device (\_SB.PCI0) + { + #include + #include + #include + } +} diff --git a/src/mainboard/lenovo/haswell/gma-mainboard.ads b/src/mainboard/lenovo/haswell/gma-mainboard.ads new file mode 100644 index 0000000000..62dfc38228 --- /dev/null +++ b/src/mainboard/lenovo/haswell/gma-mainboard.ads @@ -0,0 +1,18 @@ +-- SPDX-License-Identifier: GPL-2.0-or-later + +with HW.GFX.GMA; +with HW.GFX.GMA.Display_Probing; + +use HW.GFX.GMA; +use HW.GFX.GMA.Display_Probing; + +private package GMA.Mainboard is + + ports : constant Port_List := + (DP1, -- MiniDP + DP2, -- dock, DP2-1 (DP/HDMI) and DP2-2 (DP/DVI) + Analog, + eDP, + others => Disabled); + +end GMA.Mainboard; diff --git a/src/mainboard/lenovo/haswell/gpio.c b/src/mainboard/lenovo/haswell/gpio.c new file mode 100644 index 0000000000..5494070b7a --- /dev/null +++ b/src/mainboard/lenovo/haswell/gpio.c @@ -0,0 +1,209 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +static const struct pch_gpio_set1 pch_gpio_set1_mode = { + .gpio0 = GPIO_MODE_GPIO, + .gpio1 = GPIO_MODE_GPIO, + .gpio2 = GPIO_MODE_GPIO, + .gpio3 = GPIO_MODE_GPIO, + .gpio4 = GPIO_MODE_GPIO, + .gpio5 = GPIO_MODE_GPIO, + .gpio6 = GPIO_MODE_GPIO, + .gpio7 = GPIO_MODE_GPIO, + .gpio8 = GPIO_MODE_GPIO, + .gpio9 = GPIO_MODE_NATIVE, + .gpio10 = GPIO_MODE_GPIO, + .gpio11 = GPIO_MODE_GPIO, + .gpio12 = GPIO_MODE_NATIVE, + .gpio13 = GPIO_MODE_GPIO, + .gpio14 = GPIO_MODE_NATIVE, + .gpio15 = GPIO_MODE_GPIO, + .gpio16 = GPIO_MODE_NATIVE, + .gpio17 = GPIO_MODE_GPIO, + .gpio18 = GPIO_MODE_NATIVE, + .gpio19 = GPIO_MODE_NATIVE, + .gpio20 = GPIO_MODE_NATIVE, + .gpio21 = GPIO_MODE_GPIO, + .gpio22 = GPIO_MODE_GPIO, + .gpio23 = GPIO_MODE_NATIVE, + .gpio24 = GPIO_MODE_GPIO, + .gpio25 = GPIO_MODE_NATIVE, + .gpio26 = GPIO_MODE_NATIVE, + .gpio27 = GPIO_MODE_GPIO, + .gpio28 = GPIO_MODE_GPIO, + .gpio29 = GPIO_MODE_NATIVE, + .gpio30 = GPIO_MODE_NATIVE, + .gpio31 = GPIO_MODE_GPIO, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_direction = { + .gpio0 = GPIO_DIR_INPUT, + .gpio1 = GPIO_DIR_INPUT, + .gpio2 = GPIO_DIR_INPUT, + .gpio3 = GPIO_DIR_OUTPUT, + .gpio4 = GPIO_DIR_OUTPUT, + .gpio5 = GPIO_DIR_INPUT, + .gpio6 = GPIO_DIR_INPUT, + .gpio7 = GPIO_DIR_OUTPUT, + .gpio8 = GPIO_DIR_OUTPUT, + .gpio10 = GPIO_DIR_OUTPUT, + .gpio11 = GPIO_DIR_INPUT, + .gpio13 = GPIO_DIR_INPUT, + .gpio15 = GPIO_DIR_OUTPUT, + .gpio17 = GPIO_DIR_INPUT, + .gpio21 = GPIO_DIR_INPUT, + .gpio22 = GPIO_DIR_OUTPUT, + .gpio24 = GPIO_DIR_OUTPUT, + .gpio27 = GPIO_DIR_INPUT, + .gpio28 = GPIO_DIR_OUTPUT, + .gpio31 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_level = { + .gpio3 = GPIO_LEVEL_LOW, + .gpio4 = GPIO_LEVEL_LOW, + .gpio7 = GPIO_LEVEL_LOW, + .gpio8 = GPIO_LEVEL_HIGH, + .gpio10 = GPIO_LEVEL_HIGH, + .gpio15 = GPIO_LEVEL_LOW, + .gpio22 = GPIO_LEVEL_LOW, + .gpio24 = GPIO_LEVEL_HIGH, + .gpio28 = GPIO_LEVEL_LOW, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_reset = { + .gpio24 = GPIO_RESET_RSMRST, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_invert = { + .gpio0 = GPIO_INVERT, + .gpio1 = GPIO_INVERT, + .gpio11 = GPIO_INVERT, + .gpio13 = GPIO_INVERT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_blink = { +}; + +static const struct pch_gpio_set2 pch_gpio_set2_mode = { + .gpio32 = GPIO_MODE_NATIVE, + .gpio33 = GPIO_MODE_GPIO, + .gpio34 = GPIO_MODE_GPIO, + .gpio35 = GPIO_MODE_GPIO, + .gpio36 = GPIO_MODE_GPIO, + .gpio37 = GPIO_MODE_GPIO, + .gpio38 = GPIO_MODE_GPIO, + .gpio39 = GPIO_MODE_GPIO, + .gpio40 = GPIO_MODE_NATIVE, + .gpio41 = GPIO_MODE_NATIVE, + .gpio42 = GPIO_MODE_NATIVE, + .gpio43 = GPIO_MODE_GPIO, + .gpio44 = GPIO_MODE_NATIVE, + .gpio45 = GPIO_MODE_NATIVE, + .gpio46 = GPIO_MODE_NATIVE, + .gpio47 = GPIO_MODE_NATIVE, + .gpio48 = GPIO_MODE_GPIO, + .gpio49 = GPIO_MODE_NATIVE, + .gpio50 = GPIO_MODE_GPIO, + .gpio51 = GPIO_MODE_GPIO, + .gpio52 = GPIO_MODE_GPIO, + .gpio53 = GPIO_MODE_GPIO, + .gpio54 = GPIO_MODE_GPIO, + .gpio55 = GPIO_MODE_GPIO, + .gpio56 = GPIO_MODE_NATIVE, + .gpio57 = GPIO_MODE_GPIO, + .gpio58 = GPIO_MODE_NATIVE, + .gpio59 = GPIO_MODE_NATIVE, + .gpio60 = GPIO_MODE_NATIVE, + .gpio61 = GPIO_MODE_NATIVE, + .gpio62 = GPIO_MODE_NATIVE, + .gpio63 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_direction = { + .gpio33 = GPIO_DIR_OUTPUT, + .gpio34 = GPIO_DIR_INPUT, + .gpio35 = GPIO_DIR_OUTPUT, + .gpio36 = GPIO_DIR_INPUT, + .gpio37 = GPIO_DIR_INPUT, + .gpio38 = GPIO_DIR_INPUT, + .gpio39 = GPIO_DIR_INPUT, + .gpio43 = GPIO_DIR_OUTPUT, + .gpio48 = GPIO_DIR_INPUT, + .gpio50 = GPIO_DIR_INPUT, + .gpio51 = GPIO_DIR_OUTPUT, + .gpio52 = GPIO_DIR_INPUT, + .gpio53 = GPIO_DIR_OUTPUT, + .gpio54 = GPIO_DIR_OUTPUT, + .gpio55 = GPIO_DIR_OUTPUT, + .gpio57 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_level = { + .gpio33 = GPIO_LEVEL_HIGH, + .gpio35 = GPIO_LEVEL_LOW, + .gpio43 = GPIO_LEVEL_HIGH, + .gpio51 = GPIO_LEVEL_HIGH, + .gpio53 = GPIO_LEVEL_HIGH, + .gpio54 = GPIO_LEVEL_LOW, + .gpio55 = GPIO_LEVEL_HIGH, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_reset = { +}; + +static const struct pch_gpio_set3 pch_gpio_set3_mode = { + .gpio64 = GPIO_MODE_GPIO, + .gpio65 = GPIO_MODE_GPIO, + .gpio66 = GPIO_MODE_GPIO, + .gpio67 = GPIO_MODE_GPIO, + .gpio68 = GPIO_MODE_GPIO, + .gpio69 = GPIO_MODE_GPIO, + .gpio70 = GPIO_MODE_GPIO, + .gpio71 = GPIO_MODE_GPIO, + .gpio72 = GPIO_MODE_NATIVE, + .gpio73 = GPIO_MODE_NATIVE, + .gpio74 = GPIO_MODE_NATIVE, + .gpio75 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_direction = { + .gpio64 = GPIO_DIR_INPUT, + .gpio65 = GPIO_DIR_INPUT, + .gpio66 = GPIO_DIR_INPUT, + .gpio67 = GPIO_DIR_INPUT, + .gpio68 = GPIO_DIR_INPUT, + .gpio69 = GPIO_DIR_INPUT, + .gpio70 = GPIO_DIR_INPUT, + .gpio71 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_level = { +}; + +static const struct pch_gpio_set3 pch_gpio_set3_reset = { +}; + +const struct pch_gpio_map mainboard_gpio_map = { + .set1 = { + .mode = &pch_gpio_set1_mode, + .direction = &pch_gpio_set1_direction, + .level = &pch_gpio_set1_level, + .blink = &pch_gpio_set1_blink, + .invert = &pch_gpio_set1_invert, + .reset = &pch_gpio_set1_reset, + }, + .set2 = { + .mode = &pch_gpio_set2_mode, + .direction = &pch_gpio_set2_direction, + .level = &pch_gpio_set2_level, + .reset = &pch_gpio_set2_reset, + }, + .set3 = { + .mode = &pch_gpio_set3_mode, + .direction = &pch_gpio_set3_direction, + .level = &pch_gpio_set3_level, + .reset = &pch_gpio_set3_reset, + }, +}; diff --git a/src/mainboard/lenovo/haswell/hda_verb.c b/src/mainboard/lenovo/haswell/hda_verb.c new file mode 100644 index 0000000000..fac8400223 --- /dev/null +++ b/src/mainboard/lenovo/haswell/hda_verb.c @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +const u32 cim_verb_data[] = { + 0x10ec0292, /* Codec Vendor / Device ID: Realtek */ + 0x17aa220e, /* Subsystem ID */ + 32, /* Number of 4 dword sets */ + AZALIA_SUBVENDOR(0, 0x17aa220e), + AZALIA_RESET(1), + AZALIA_PIN_CFG(0, 0x12, 0x90a60130), + AZALIA_PIN_CFG(0, 0x13, 0x40000000), + AZALIA_PIN_CFG(0, 0x14, 0x90170110), + AZALIA_PIN_CFG(0, 0x15, 0x0321101f), + AZALIA_PIN_CFG(0, 0x16, 0x411111f0), + AZALIA_PIN_CFG(0, 0x18, 0x411111f0), + AZALIA_PIN_CFG(0, 0x19, 0x411111f0), + AZALIA_PIN_CFG(0, 0x1a, 0x03a11020), + AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), + AZALIA_PIN_CFG(0, 0x1d, 0x40738105), + AZALIA_PIN_CFG(0, 0x1e, 0x411111f0), + + 0x05350000, 0x0534601a, 0x05450000, 0x05442000, + 0x05350003, 0x05341ef8, 0x05450003, 0x05441ef8, + 0x05350016, 0x05341ee1, 0x05450016, 0x05441ee1, + 0x05350023, 0x05341f7b, 0x05450023, 0x05441f7b, + 0x05350030, 0x05341fbd, 0x05450030, 0x05441fbd, + 0x05350000, 0x0534e01a, 0x05450030, 0x05441fbd, + 0x02050020, 0x02048014, 0x02050020, 0x02040014, + 0x05350000, 0x0534e01a, 0x05450000, 0x0544e01a, + 0x0205001c, 0x02046800, 0x0205006d, 0x0204aa10, + 0x02050076, 0x02040009, 0x0205006b, 0x02045029, + 0x0205006c, 0x0204a400, 0x02050018, 0x02047208, + 0x0205001a, 0x02049ad2, 0x02050014, 0x02040710, + 0x02050079, 0x02040b40, 0x02050070, 0x02048800, + 0x00b3f410, 0x00c3f11f, 0x00c3f001, 0x015707c0, + 0x0153b080, 0x01470740, 0x0143b000, 0x02050004, + 0x02040080, 0x01470c02, 0x000f0000, 0x000f0000, + 0x02050029, 0x02040050, 0x02050025, 0x0204ebc2, + 0x02050026, 0x02044028, 0x02050029, 0x02040250, + 0x000f0000, 0x000f0000, 0x02050005, 0x0204ff1f, +}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/lenovo/haswell/mainboard.c b/src/mainboard/lenovo/haswell/mainboard.c new file mode 100644 index 0000000000..e9ff4f5cbe --- /dev/null +++ b/src/mainboard/lenovo/haswell/mainboard.c @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include + +static void mainboard_enable(struct device *dev) +{ + install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, + GMA_INT15_PANEL_FIT_DEFAULT, + GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); +} + +struct chip_operations mainboard_ops = { + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/lenovo/haswell/romstage.c b/src/mainboard/lenovo/haswell/romstage.c new file mode 100644 index 0000000000..8a7da158e3 --- /dev/null +++ b/src/mainboard/lenovo/haswell/romstage.c @@ -0,0 +1,69 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include +#include +#include + +void mainboard_config_rcba(void) +{ + RCBA16(D31IR) = DIR_ROUTE(PIRQA, PIRQD, PIRQC, PIRQA); + RCBA16(D29IR) = DIR_ROUTE(PIRQH, PIRQD, PIRQA, PIRQC); + RCBA16(D28IR) = DIR_ROUTE(PIRQA, PIRQA, PIRQA, PIRQA); + RCBA16(D27IR) = DIR_ROUTE(PIRQG, PIRQB, PIRQC, PIRQD); + RCBA16(D26IR) = DIR_ROUTE(PIRQA, PIRQF, PIRQC, PIRQD); + RCBA16(D25IR) = DIR_ROUTE(PIRQE, PIRQF, PIRQG, PIRQH); + RCBA16(D22IR) = DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD); + RCBA16(D20IR) = DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD); +} + +void mb_late_romstage_setup(void) +{ + u8 enable_peg = get_uint_option("enable_dual_graphics", 0); + + bool power_en = pmh7_dgpu_power_state(); + + if (enable_peg != power_en) + pmh7_dgpu_power_enable(!power_en); + + if (!enable_peg) { + // Hide disabled dGPU device + pci_and_config32(HOST_BRIDGE, DEVEN, ~DEVEN_D1F0EN); + } +} + +void mb_get_spd_map(struct spd_info *spdi) +{ + spdi->addresses[0] = 0x50; + spdi->addresses[2] = 0x51; +} + +const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS] = { + /* Length, Enable, OCn#, Location */ + { 0x0040, 1, 0, USB_PORT_BACK_PANEL }, /* USB3 */ + { 0x0040, 1, 0, USB_PORT_BACK_PANEL }, /* USB3 */ + { 0x0110, 1, 1, USB_PORT_BACK_PANEL }, /* USB2 charge */ + { 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL }, + { 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_DOCK }, + { 0x0080, 1, 2, USB_PORT_BACK_PANEL }, /* USB2 */ + { 0x0040, 1, 3, USB_PORT_BACK_PANEL }, + { 0x0040, 1, 3, USB_PORT_BACK_PANEL }, + { 0x0040, 1, 4, USB_PORT_BACK_PANEL }, + { 0x0110, 1, 4, USB_PORT_BACK_PANEL }, /* WWAN */ + { 0x0040, 1, 5, USB_PORT_INTERNAL }, /* WLAN */ + { 0x0040, 1, 5, USB_PORT_BACK_PANEL }, /* webcam */ + { 0x0080, 1, 6, USB_PORT_BACK_PANEL }, + { 0x0040, 1, 6, USB_PORT_BACK_PANEL }, +}; + +const struct usb3_port_config mainboard_usb3_ports[MAX_USB3_PORTS] = { + { 1, 0 }, + { 1, 0 }, + { 1, USB_OC_PIN_SKIP }, + { 1, USB_OC_PIN_SKIP }, + { 1, 1 }, + { 1, 1 }, /* WWAN */ +}; diff --git a/src/mainboard/lenovo/haswell/smihandler.c b/src/mainboard/lenovo/haswell/smihandler.c new file mode 100644 index 0000000000..de48240e88 --- /dev/null +++ b/src/mainboard/lenovo/haswell/smihandler.c @@ -0,0 +1,85 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include +#include +#include + +#define GPE_EC_SCI 1 +#define GPE_EC_WAKE 13 + +static void mainboard_smi_handle_ec_sci(void) +{ + u8 status = inb(EC_SC); + u8 event; + + if (!(status & EC_SCI_EVT)) + return; + + event = ec_query(); + printk(BIOS_DEBUG, "EC event %#02x\n", event); +} + +void mainboard_smi_gpi(u32 gpi_sts) +{ + if (gpi_sts & (1 << GPE_EC_SCI)) + mainboard_smi_handle_ec_sci(); +} + +/* lynxpoint doesn't have gpi_route_interrupt, so add it */ +#define GPI_DISABLE 0x00 +#define GPI_IS_SMI 0x01 +#define GPI_IS_SCI 0x02 +#define GPI_IS_NMI 0x03 + +static void gpi_route_interrupt(u8 gpi, u8 mode) +{ + u32 gpi_rout; + + gpi_rout = pci_read_config32(PCI_DEV(0, 0x1f, 0), GPIO_ROUT); + gpi_rout &= ~(3 << (2 * gpi)); + gpi_rout |= ((mode & 3) << (2 * gpi)); + pci_write_config32(PCI_DEV(0, 0x1f, 0), GPIO_ROUT, gpi_rout); +} + +int mainboard_smi_apmc(u8 data) +{ + switch (data) { + case APM_CNT_ACPI_ENABLE: + /* use 0x1600/0x1604 to prevent races with userspace */ + ec_set_ports(0x1604, 0x1600); + /* route EC_SCI to SCI */ + gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI); + /* discard all events, and enable attention */ + ec_write(0x80, 0x01); + break; + case APM_CNT_ACPI_DISABLE: + /* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't + provide a EC query function */ + ec_set_ports(0x66, 0x62); + /* route EC_SCI to SMI */ + gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI); + /* discard all events, and enable attention */ + ec_write(0x80, 0x01); + break; + default: + break; + } + return 0; +} + +void mainboard_smi_sleep(u8 slp_typ) +{ + if (slp_typ == 3) { + u8 ec_wake = ec_read(0x32); + /* If EC wake events are enabled, + * enable wake on EC WAKE GPE. */ + if (ec_wake & 0x14) { + /* Redirect EC WAKE GPE to SCI. */ + gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI); + } + } +} diff --git a/src/mainboard/lenovo/haswell/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/haswell/vboot-ro-me_clean.fmd new file mode 100644 index 0000000000..565cacd3a8 --- /dev/null +++ b/src/mainboard/lenovo/haswell/vboot-ro-me_clean.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x20000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0xbe0000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/haswell/vboot-ro.fmd b/src/mainboard/lenovo/haswell/vboot-ro.fmd new file mode 100644 index 0000000000..6bdd4cc458 --- /dev/null +++ b/src/mainboard/lenovo/haswell/vboot-ro.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x500000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0x700000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/haswell/vboot-rwab.fmd b/src/mainboard/lenovo/haswell/vboot-rwab.fmd new file mode 100644 index 0000000000..1747c0e708 --- /dev/null +++ b/src/mainboard/lenovo/haswell/vboot-rwab.fmd @@ -0,0 +1,34 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL@0x0 0x500000 { + SI_DESC@0x0 0x1000 + SI_GBE@0x1000 0x2000 + SI_ME + } + SI_BIOS@0x500000 0x700000 { + RW_SECTION_A 0x280000 { + VBLOCK_A 0x10000 + FW_MAIN_A(CBFS) + RW_FWID_A 0x40 + } + RW_SECTION_B 0x280000 { + VBLOCK_B 0x10000 + FW_MAIN_B(CBFS) + RW_FWID_B 0x40 + } + UNIFIED_MRC_CACHE@0x500000 0x20000 { + RECOVERY_MRC_CACHE@0x0 0x10000 + RW_MRC_CACHE@0x10000 0x10000 + } + RW_VPD(PRESERVE) 0x1000 + SMMSTORE(PRESERVE)@0x521000 0x40000 + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + RO_VPD(PRESERVE) 0x1000 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/t440p/Kconfig b/src/mainboard/lenovo/t440p/Kconfig deleted file mode 100644 index 4e14907cd7..0000000000 --- a/src/mainboard/lenovo/t440p/Kconfig +++ /dev/null @@ -1,73 +0,0 @@ -if BOARD_LENOVO_THINKPAD_T440P - -config BOARD_SPECIFIC_OPTIONS - def_bool y - select BOARD_ROMSIZE_KB_12288 - select EC_LENOVO_H8 - select EC_LENOVO_PMH7 - select H8_HAS_BAT_THRESHOLDS_IMPL - select H8_HAS_PRIMARY_FN_KEYS - select HAVE_ACPI_RESUME - select HAVE_ACPI_TABLES - select HAVE_CMOS_DEFAULT - select HAVE_OPTION_TABLE - select MEMORY_MAPPED_TPM - select MAINBOARD_HAS_TPM1 - select INTEL_GMA_HAVE_VBT - select INTEL_INT15 - select MAINBOARD_HAS_LIBGFXINIT - select MAINBOARD_HAS_TPM1 - select MAINBOARD_USES_IFD_GBE_REGION - select MEMORY_MAPPED_TPM - select NO_UART_ON_SUPERIO - select NORTHBRIDGE_INTEL_HASWELL - select SERIRQ_CONTINUOUS_MODE - select SOUTHBRIDGE_INTEL_LYNXPOINT - select SYSTEM_TYPE_LAPTOP - -config VBOOT - select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC - select GBB_FLAG_DISABLE_FWMP - select GBB_FLAG_DISABLE_LID_SHUTDOWN - select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC - select HAS_RECOVERY_MRC_CACHE - select VBOOT_VBNV_CMOS - -config VBOOT_SLOTS_RW_AB - default y - -config VBOOT_VBNV_OFFSET - hex - default 0x2a - -config FMDFILE - default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/vboot-rwab.fmd" if VBOOT - -config MAINBOARD_DIR - default "lenovo/t440p" - -config MAINBOARD_PART_NUMBER - default "ThinkPad T440p" - -config VGA_BIOS_ID - string - default "8086,0416" - -config USBDEBUG_HCD_INDEX - int - default 2 - -config DRIVER_LENOVO_SERIALS - bool - default n - -config PS2K_EISAID - default "LEN0071" - -config PS2M_EISAID - default "LEN0036" - -config THINKPADEC_HKEY_EISAID - default "LEN0068" - -endif diff --git a/src/mainboard/lenovo/t440p/Kconfig.name b/src/mainboard/lenovo/t440p/Kconfig.name deleted file mode 100644 index e90299d930..0000000000 --- a/src/mainboard/lenovo/t440p/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config BOARD_LENOVO_THINKPAD_T440P - bool "ThinkPad T440p" diff --git a/src/mainboard/lenovo/t440p/Makefile.inc b/src/mainboard/lenovo/t440p/Makefile.inc deleted file mode 100644 index ebe01aea99..0000000000 --- a/src/mainboard/lenovo/t440p/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -romstage-y += gpio.c -ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads diff --git a/src/mainboard/lenovo/t440p/acpi/ec.asl b/src/mainboard/lenovo/t440p/acpi/ec.asl deleted file mode 100644 index 8dea152079..0000000000 --- a/src/mainboard/lenovo/t440p/acpi/ec.asl +++ /dev/null @@ -1,4 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include -#include diff --git a/src/mainboard/lenovo/t440p/acpi/platform.asl b/src/mainboard/lenovo/t440p/acpi/platform.asl deleted file mode 100644 index f5a4df75f4..0000000000 --- a/src/mainboard/lenovo/t440p/acpi/platform.asl +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -Method(_WAK,1) -{ - /* ME may not be up yet. */ - \_TZ.MEB1 = 0 - \_TZ.MEB2 = 0 - Return(Package(){0,0}) -} - -Method(_PTS,1) -{ - \_SB.PCI0.LPCB.EC.RADI(0) -} diff --git a/src/mainboard/lenovo/t440p/acpi/superio.asl b/src/mainboard/lenovo/t440p/acpi/superio.asl deleted file mode 100644 index ee2eabeb75..0000000000 --- a/src/mainboard/lenovo/t440p/acpi/superio.asl +++ /dev/null @@ -1,3 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include diff --git a/src/mainboard/lenovo/t440p/acpi_tables.c b/src/mainboard/lenovo/t440p/acpi_tables.c deleted file mode 100644 index 0301443f88..0000000000 --- a/src/mainboard/lenovo/t440p/acpi_tables.c +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include -#include - -void mainboard_fill_gnvs(struct global_nvs *gnvs) -{ - /* The lid is open by default. */ - gnvs->lids = 1; - - /* Temperature at which OS will shutdown. */ - gnvs->tcrt = 100; - /* Temperature at which OS will throttle CPU. */ - gnvs->tpsv = 90; -} diff --git a/src/mainboard/lenovo/t440p/board_info.txt b/src/mainboard/lenovo/t440p/board_info.txt deleted file mode 100644 index 46461fe7da..0000000000 --- a/src/mainboard/lenovo/t440p/board_info.txt +++ /dev/null @@ -1,7 +0,0 @@ -Category: laptop -Board URL: https://pcsupport.lenovo.com/us/zh/products/laptops-and-netbooks/thinkpad-t-series-laptops/thinkpad-t440p -ROM package: SOIC-8 -ROM protocol: SPI -ROM socketed: n -Flashrom support: n -Release year: 2013 diff --git a/src/mainboard/lenovo/t440p/cmos.default b/src/mainboard/lenovo/t440p/cmos.default deleted file mode 100644 index bb8626d48b..0000000000 --- a/src/mainboard/lenovo/t440p/cmos.default +++ /dev/null @@ -1,14 +0,0 @@ -boot_option=Fallback -debug_level=Debug -power_on_after_fail=Disable -nmi=Enable -volume=0x3 -first_battery=Primary -wlan=Enable -fn_ctrl_swap=Disable -f1_to_f12_as_primary=Enable -sticky_fn=Disable -trackpoint=Enable -backlight=Keyboard -enable_dual_graphics=Disable -usb_always_on=Disable diff --git a/src/mainboard/lenovo/t440p/cmos.layout b/src/mainboard/lenovo/t440p/cmos.layout deleted file mode 100644 index 464d24277b..0000000000 --- a/src/mainboard/lenovo/t440p/cmos.layout +++ /dev/null @@ -1,83 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -# ----------------------------------------------------------------- -entries - -# ----------------------------------------------------------------- -0 120 r 0 reserved_memory - -# ----------------------------------------------------------------- -# RTC_BOOT_BYTE (coreboot hardcoded) -384 1 e 4 boot_option -388 4 h 0 reboot_counter - -# ----------------------------------------------------------------- -# coreboot config options: console -395 4 e 6 debug_level - -#400 8 r 0 reserved for century byte - -# coreboot config options: southbridge -408 1 e 1 nmi -409 2 e 7 power_on_after_fail - -# coreboot config options: EC -411 1 e 8 first_battery -415 1 e 1 wlan -416 1 e 1 trackpoint -417 1 e 1 fn_ctrl_swap -418 1 e 1 sticky_fn -419 2 e 13 usb_always_on -422 2 e 10 backlight -424 1 e 1 f1_to_f12_as_primary - -# coreboot config options: northbridge -435 1 e 1 enable_dual_graphics -440 8 h 0 volume - -# VBOOT -448 128 r 0 vbnv - -# coreboot config options: check sums -984 16 h 0 check_sum - -# ----------------------------------------------------------------- - -enumerations - -#ID value text -1 0 Disable -1 1 Enable -2 0 Enable -2 1 Disable -4 0 Fallback -4 1 Normal -6 0 Emergency -6 1 Alert -6 2 Critical -6 3 Error -6 4 Warning -6 5 Notice -6 6 Info -6 7 Debug -6 8 Spew -7 0 Disable -7 1 Enable -7 2 Keep -8 0 Secondary -8 1 Primary -9 0 AHCI -9 1 Compatible -# Haswell ThinkPads have no Thinklight -#10 0 Both -10 1 Keyboard -#10 2 Thinklight only -10 3 None -13 0 Disable -13 1 AC and battery -13 2 AC only - -# ----------------------------------------------------------------- -checksums - -checksum 392 447 984 diff --git a/src/mainboard/lenovo/t440p/data.vbt b/src/mainboard/lenovo/t440p/data.vbt deleted file mode 100644 index 79077ccb0a..0000000000 Binary files a/src/mainboard/lenovo/t440p/data.vbt and /dev/null differ diff --git a/src/mainboard/lenovo/t440p/devicetree.cb b/src/mainboard/lenovo/t440p/devicetree.cb deleted file mode 100644 index b7588ea77d..0000000000 --- a/src/mainboard/lenovo/t440p/devicetree.cb +++ /dev/null @@ -1,99 +0,0 @@ -chip northbridge/intel/haswell - register "gfx" = "GMA_STATIC_DISPLAYS(0)" - register "gpu_ddi_e_connected" = "1" - register "gpu_dp_b_hotplug" = "4" - register "gpu_dp_c_hotplug" = "4" - register "gpu_dp_d_hotplug" = "4" - register "panel_cfg" = "{ - .up_delay_ms = 200, - .down_delay_ms = 50, - .cycle_delay_ms = 500, - .backlight_on_delay_ms = 1, - .backlight_off_delay_ms = 1, - .backlight_pwm_hz = 220, - }" - register "ec_present" = "true" - device cpu_cluster 0 on - chip cpu/intel/haswell - device lapic 0 on end - device lapic 0xacac off end - end - end - device domain 0 on - subsystemid 0x17aa 0x220e inherit - - device pci 00.0 on end # Host bridge - device pci 01.0 on end # PCIe Bridge for discrete graphics - device pci 01.1 off end # Unused PCIe Bridge - device pci 02.0 on end # Internal graphics VGA controller - device pci 03.0 on end # Mini-HD audio - - chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point PCH - register "gen1_dec" = "0x007c1601" - register "gen2_dec" = "0x000c15e1" - register "gen4_dec" = "0x000c06a1" - register "gpi13_routing" = "2" - register "gpi1_routing" = "2" - # 0(HDD), 1(M.2), 5(ODD) - register "sata_port_map" = "0x23" - device pci 14.0 on end # xHCI Controller - device pci 16.0 on end # Management Engine Interface 1 - device pci 16.1 off end # Management Engine Interface 2 - device pci 16.2 off end # Management Engine IDE-R - device pci 16.3 off end # Management Engine KT - device pci 19.0 on end # Intel Gigabit Ethernet - device pci 1a.0 on end # USB2 EHCI #2 - device pci 1b.0 on end # High Definition Audio Audio controller - device pci 1c.0 on end # PCIe Port #1, Realtek Card Reader - device pci 1c.1 on # PCIe Port #2, WLAN - smbios_slot_desc "0x14" "1" "M.2 2230" "8" - end - device pci 1c.2 off end # PCIe Port #3 - device pci 1c.3 off end # PCIe Port #4 - device pci 1c.4 off end # PCIe Port #5 - device pci 1c.5 off end # PCIe Port #6 - device pci 1c.6 off end # PCIe Port #7 - device pci 1c.7 off end # PCIe Port #8 - device pci 1d.0 on end # USB2 EHCI #1 - device pci 1f.0 on # LPC bridge - chip ec/lenovo/pmh7 - register "backlight_enable" = "0x01" - register "dock_event_enable" = "0x01" - device pnp ff.1 on end # dummy - end - chip ec/lenovo/h8 - register "beepmask0" = "0x00" - register "beepmask1" = "0x86" - register "config0" = "0xa6" - register "config1" = "0x0d" - register "config2" = "0xa8" - register "config3" = "0xc4" - register "has_keyboard_backlight" = "1" - register "event2_enable" = "0xff" - register "event3_enable" = "0xff" - register "event4_enable" = "0xd0" - register "event5_enable" = "0x3c" - register "event7_enable" = "0x01" - register "event8_enable" = "0x7b" - register "event9_enable" = "0xff" - register "eventc_enable" = "0xff" - register "eventd_enable" = "0xff" - register "evente_enable" = "0x9d" - device pnp ff.2 on # dummy - io 0x60 = 0x62 - io 0x62 = 0x66 - io 0x64 = 0x1600 - io 0x66 = 0x1604 - end - end - chip drivers/pc80/tpm - device pnp 0c31.0 on end - end - end - device pci 1f.2 on end # SATA Controller 1 - device pci 1f.3 on end # SMBus - device pci 1f.5 off end # SATA Controller 2 - device pci 1f.6 off end # Thermal - end - end -end diff --git a/src/mainboard/lenovo/t440p/dsdt.asl b/src/mainboard/lenovo/t440p/dsdt.asl deleted file mode 100644 index a7afeee766..0000000000 --- a/src/mainboard/lenovo/t440p/dsdt.asl +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB -#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB -#define EC_LENOVO_H8_ME_WORKAROUND 1 -#define THINKPAD_EC_GPE 17 - -#include -DefinitionBlock( - "dsdt.aml", - "DSDT", - ACPI_DSDT_REV_2, - OEM_ID, - ACPI_TABLE_CREATOR, - 0x20141018 // OEM revision -) -{ - #include - #include "acpi/platform.asl" - #include - #include - #include - #include - - Device (\_SB.PCI0) - { - #include - #include - #include - } -} diff --git a/src/mainboard/lenovo/t440p/gma-mainboard.ads b/src/mainboard/lenovo/t440p/gma-mainboard.ads deleted file mode 100644 index 62dfc38228..0000000000 --- a/src/mainboard/lenovo/t440p/gma-mainboard.ads +++ /dev/null @@ -1,18 +0,0 @@ --- SPDX-License-Identifier: GPL-2.0-or-later - -with HW.GFX.GMA; -with HW.GFX.GMA.Display_Probing; - -use HW.GFX.GMA; -use HW.GFX.GMA.Display_Probing; - -private package GMA.Mainboard is - - ports : constant Port_List := - (DP1, -- MiniDP - DP2, -- dock, DP2-1 (DP/HDMI) and DP2-2 (DP/DVI) - Analog, - eDP, - others => Disabled); - -end GMA.Mainboard; diff --git a/src/mainboard/lenovo/t440p/gpio.c b/src/mainboard/lenovo/t440p/gpio.c deleted file mode 100644 index 5494070b7a..0000000000 --- a/src/mainboard/lenovo/t440p/gpio.c +++ /dev/null @@ -1,209 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include - -static const struct pch_gpio_set1 pch_gpio_set1_mode = { - .gpio0 = GPIO_MODE_GPIO, - .gpio1 = GPIO_MODE_GPIO, - .gpio2 = GPIO_MODE_GPIO, - .gpio3 = GPIO_MODE_GPIO, - .gpio4 = GPIO_MODE_GPIO, - .gpio5 = GPIO_MODE_GPIO, - .gpio6 = GPIO_MODE_GPIO, - .gpio7 = GPIO_MODE_GPIO, - .gpio8 = GPIO_MODE_GPIO, - .gpio9 = GPIO_MODE_NATIVE, - .gpio10 = GPIO_MODE_GPIO, - .gpio11 = GPIO_MODE_GPIO, - .gpio12 = GPIO_MODE_NATIVE, - .gpio13 = GPIO_MODE_GPIO, - .gpio14 = GPIO_MODE_NATIVE, - .gpio15 = GPIO_MODE_GPIO, - .gpio16 = GPIO_MODE_NATIVE, - .gpio17 = GPIO_MODE_GPIO, - .gpio18 = GPIO_MODE_NATIVE, - .gpio19 = GPIO_MODE_NATIVE, - .gpio20 = GPIO_MODE_NATIVE, - .gpio21 = GPIO_MODE_GPIO, - .gpio22 = GPIO_MODE_GPIO, - .gpio23 = GPIO_MODE_NATIVE, - .gpio24 = GPIO_MODE_GPIO, - .gpio25 = GPIO_MODE_NATIVE, - .gpio26 = GPIO_MODE_NATIVE, - .gpio27 = GPIO_MODE_GPIO, - .gpio28 = GPIO_MODE_GPIO, - .gpio29 = GPIO_MODE_NATIVE, - .gpio30 = GPIO_MODE_NATIVE, - .gpio31 = GPIO_MODE_GPIO, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_direction = { - .gpio0 = GPIO_DIR_INPUT, - .gpio1 = GPIO_DIR_INPUT, - .gpio2 = GPIO_DIR_INPUT, - .gpio3 = GPIO_DIR_OUTPUT, - .gpio4 = GPIO_DIR_OUTPUT, - .gpio5 = GPIO_DIR_INPUT, - .gpio6 = GPIO_DIR_INPUT, - .gpio7 = GPIO_DIR_OUTPUT, - .gpio8 = GPIO_DIR_OUTPUT, - .gpio10 = GPIO_DIR_OUTPUT, - .gpio11 = GPIO_DIR_INPUT, - .gpio13 = GPIO_DIR_INPUT, - .gpio15 = GPIO_DIR_OUTPUT, - .gpio17 = GPIO_DIR_INPUT, - .gpio21 = GPIO_DIR_INPUT, - .gpio22 = GPIO_DIR_OUTPUT, - .gpio24 = GPIO_DIR_OUTPUT, - .gpio27 = GPIO_DIR_INPUT, - .gpio28 = GPIO_DIR_OUTPUT, - .gpio31 = GPIO_DIR_INPUT, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_level = { - .gpio3 = GPIO_LEVEL_LOW, - .gpio4 = GPIO_LEVEL_LOW, - .gpio7 = GPIO_LEVEL_LOW, - .gpio8 = GPIO_LEVEL_HIGH, - .gpio10 = GPIO_LEVEL_HIGH, - .gpio15 = GPIO_LEVEL_LOW, - .gpio22 = GPIO_LEVEL_LOW, - .gpio24 = GPIO_LEVEL_HIGH, - .gpio28 = GPIO_LEVEL_LOW, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_reset = { - .gpio24 = GPIO_RESET_RSMRST, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_invert = { - .gpio0 = GPIO_INVERT, - .gpio1 = GPIO_INVERT, - .gpio11 = GPIO_INVERT, - .gpio13 = GPIO_INVERT, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_blink = { -}; - -static const struct pch_gpio_set2 pch_gpio_set2_mode = { - .gpio32 = GPIO_MODE_NATIVE, - .gpio33 = GPIO_MODE_GPIO, - .gpio34 = GPIO_MODE_GPIO, - .gpio35 = GPIO_MODE_GPIO, - .gpio36 = GPIO_MODE_GPIO, - .gpio37 = GPIO_MODE_GPIO, - .gpio38 = GPIO_MODE_GPIO, - .gpio39 = GPIO_MODE_GPIO, - .gpio40 = GPIO_MODE_NATIVE, - .gpio41 = GPIO_MODE_NATIVE, - .gpio42 = GPIO_MODE_NATIVE, - .gpio43 = GPIO_MODE_GPIO, - .gpio44 = GPIO_MODE_NATIVE, - .gpio45 = GPIO_MODE_NATIVE, - .gpio46 = GPIO_MODE_NATIVE, - .gpio47 = GPIO_MODE_NATIVE, - .gpio48 = GPIO_MODE_GPIO, - .gpio49 = GPIO_MODE_NATIVE, - .gpio50 = GPIO_MODE_GPIO, - .gpio51 = GPIO_MODE_GPIO, - .gpio52 = GPIO_MODE_GPIO, - .gpio53 = GPIO_MODE_GPIO, - .gpio54 = GPIO_MODE_GPIO, - .gpio55 = GPIO_MODE_GPIO, - .gpio56 = GPIO_MODE_NATIVE, - .gpio57 = GPIO_MODE_GPIO, - .gpio58 = GPIO_MODE_NATIVE, - .gpio59 = GPIO_MODE_NATIVE, - .gpio60 = GPIO_MODE_NATIVE, - .gpio61 = GPIO_MODE_NATIVE, - .gpio62 = GPIO_MODE_NATIVE, - .gpio63 = GPIO_MODE_NATIVE, -}; - -static const struct pch_gpio_set2 pch_gpio_set2_direction = { - .gpio33 = GPIO_DIR_OUTPUT, - .gpio34 = GPIO_DIR_INPUT, - .gpio35 = GPIO_DIR_OUTPUT, - .gpio36 = GPIO_DIR_INPUT, - .gpio37 = GPIO_DIR_INPUT, - .gpio38 = GPIO_DIR_INPUT, - .gpio39 = GPIO_DIR_INPUT, - .gpio43 = GPIO_DIR_OUTPUT, - .gpio48 = GPIO_DIR_INPUT, - .gpio50 = GPIO_DIR_INPUT, - .gpio51 = GPIO_DIR_OUTPUT, - .gpio52 = GPIO_DIR_INPUT, - .gpio53 = GPIO_DIR_OUTPUT, - .gpio54 = GPIO_DIR_OUTPUT, - .gpio55 = GPIO_DIR_OUTPUT, - .gpio57 = GPIO_DIR_INPUT, -}; - -static const struct pch_gpio_set2 pch_gpio_set2_level = { - .gpio33 = GPIO_LEVEL_HIGH, - .gpio35 = GPIO_LEVEL_LOW, - .gpio43 = GPIO_LEVEL_HIGH, - .gpio51 = GPIO_LEVEL_HIGH, - .gpio53 = GPIO_LEVEL_HIGH, - .gpio54 = GPIO_LEVEL_LOW, - .gpio55 = GPIO_LEVEL_HIGH, -}; - -static const struct pch_gpio_set2 pch_gpio_set2_reset = { -}; - -static const struct pch_gpio_set3 pch_gpio_set3_mode = { - .gpio64 = GPIO_MODE_GPIO, - .gpio65 = GPIO_MODE_GPIO, - .gpio66 = GPIO_MODE_GPIO, - .gpio67 = GPIO_MODE_GPIO, - .gpio68 = GPIO_MODE_GPIO, - .gpio69 = GPIO_MODE_GPIO, - .gpio70 = GPIO_MODE_GPIO, - .gpio71 = GPIO_MODE_GPIO, - .gpio72 = GPIO_MODE_NATIVE, - .gpio73 = GPIO_MODE_NATIVE, - .gpio74 = GPIO_MODE_NATIVE, - .gpio75 = GPIO_MODE_NATIVE, -}; - -static const struct pch_gpio_set3 pch_gpio_set3_direction = { - .gpio64 = GPIO_DIR_INPUT, - .gpio65 = GPIO_DIR_INPUT, - .gpio66 = GPIO_DIR_INPUT, - .gpio67 = GPIO_DIR_INPUT, - .gpio68 = GPIO_DIR_INPUT, - .gpio69 = GPIO_DIR_INPUT, - .gpio70 = GPIO_DIR_INPUT, - .gpio71 = GPIO_DIR_INPUT, -}; - -static const struct pch_gpio_set3 pch_gpio_set3_level = { -}; - -static const struct pch_gpio_set3 pch_gpio_set3_reset = { -}; - -const struct pch_gpio_map mainboard_gpio_map = { - .set1 = { - .mode = &pch_gpio_set1_mode, - .direction = &pch_gpio_set1_direction, - .level = &pch_gpio_set1_level, - .blink = &pch_gpio_set1_blink, - .invert = &pch_gpio_set1_invert, - .reset = &pch_gpio_set1_reset, - }, - .set2 = { - .mode = &pch_gpio_set2_mode, - .direction = &pch_gpio_set2_direction, - .level = &pch_gpio_set2_level, - .reset = &pch_gpio_set2_reset, - }, - .set3 = { - .mode = &pch_gpio_set3_mode, - .direction = &pch_gpio_set3_direction, - .level = &pch_gpio_set3_level, - .reset = &pch_gpio_set3_reset, - }, -}; diff --git a/src/mainboard/lenovo/t440p/hda_verb.c b/src/mainboard/lenovo/t440p/hda_verb.c deleted file mode 100644 index fac8400223..0000000000 --- a/src/mainboard/lenovo/t440p/hda_verb.c +++ /dev/null @@ -1,46 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include - -const u32 cim_verb_data[] = { - 0x10ec0292, /* Codec Vendor / Device ID: Realtek */ - 0x17aa220e, /* Subsystem ID */ - 32, /* Number of 4 dword sets */ - AZALIA_SUBVENDOR(0, 0x17aa220e), - AZALIA_RESET(1), - AZALIA_PIN_CFG(0, 0x12, 0x90a60130), - AZALIA_PIN_CFG(0, 0x13, 0x40000000), - AZALIA_PIN_CFG(0, 0x14, 0x90170110), - AZALIA_PIN_CFG(0, 0x15, 0x0321101f), - AZALIA_PIN_CFG(0, 0x16, 0x411111f0), - AZALIA_PIN_CFG(0, 0x18, 0x411111f0), - AZALIA_PIN_CFG(0, 0x19, 0x411111f0), - AZALIA_PIN_CFG(0, 0x1a, 0x03a11020), - AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), - AZALIA_PIN_CFG(0, 0x1d, 0x40738105), - AZALIA_PIN_CFG(0, 0x1e, 0x411111f0), - - 0x05350000, 0x0534601a, 0x05450000, 0x05442000, - 0x05350003, 0x05341ef8, 0x05450003, 0x05441ef8, - 0x05350016, 0x05341ee1, 0x05450016, 0x05441ee1, - 0x05350023, 0x05341f7b, 0x05450023, 0x05441f7b, - 0x05350030, 0x05341fbd, 0x05450030, 0x05441fbd, - 0x05350000, 0x0534e01a, 0x05450030, 0x05441fbd, - 0x02050020, 0x02048014, 0x02050020, 0x02040014, - 0x05350000, 0x0534e01a, 0x05450000, 0x0544e01a, - 0x0205001c, 0x02046800, 0x0205006d, 0x0204aa10, - 0x02050076, 0x02040009, 0x0205006b, 0x02045029, - 0x0205006c, 0x0204a400, 0x02050018, 0x02047208, - 0x0205001a, 0x02049ad2, 0x02050014, 0x02040710, - 0x02050079, 0x02040b40, 0x02050070, 0x02048800, - 0x00b3f410, 0x00c3f11f, 0x00c3f001, 0x015707c0, - 0x0153b080, 0x01470740, 0x0143b000, 0x02050004, - 0x02040080, 0x01470c02, 0x000f0000, 0x000f0000, - 0x02050029, 0x02040050, 0x02050025, 0x0204ebc2, - 0x02050026, 0x02044028, 0x02050029, 0x02040250, - 0x000f0000, 0x000f0000, 0x02050005, 0x0204ff1f, -}; - -const u32 pc_beep_verbs[0] = {}; - -AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/lenovo/t440p/mainboard.c b/src/mainboard/lenovo/t440p/mainboard.c deleted file mode 100644 index e9ff4f5cbe..0000000000 --- a/src/mainboard/lenovo/t440p/mainboard.c +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include -#include -#include - -static void mainboard_enable(struct device *dev) -{ - install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, - GMA_INT15_PANEL_FIT_DEFAULT, - GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); -} - -struct chip_operations mainboard_ops = { - .enable_dev = mainboard_enable, -}; diff --git a/src/mainboard/lenovo/t440p/romstage.c b/src/mainboard/lenovo/t440p/romstage.c deleted file mode 100644 index 8a7da158e3..0000000000 --- a/src/mainboard/lenovo/t440p/romstage.c +++ /dev/null @@ -1,69 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include -#include -#include -#include -#include -#include -#include - -void mainboard_config_rcba(void) -{ - RCBA16(D31IR) = DIR_ROUTE(PIRQA, PIRQD, PIRQC, PIRQA); - RCBA16(D29IR) = DIR_ROUTE(PIRQH, PIRQD, PIRQA, PIRQC); - RCBA16(D28IR) = DIR_ROUTE(PIRQA, PIRQA, PIRQA, PIRQA); - RCBA16(D27IR) = DIR_ROUTE(PIRQG, PIRQB, PIRQC, PIRQD); - RCBA16(D26IR) = DIR_ROUTE(PIRQA, PIRQF, PIRQC, PIRQD); - RCBA16(D25IR) = DIR_ROUTE(PIRQE, PIRQF, PIRQG, PIRQH); - RCBA16(D22IR) = DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD); - RCBA16(D20IR) = DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD); -} - -void mb_late_romstage_setup(void) -{ - u8 enable_peg = get_uint_option("enable_dual_graphics", 0); - - bool power_en = pmh7_dgpu_power_state(); - - if (enable_peg != power_en) - pmh7_dgpu_power_enable(!power_en); - - if (!enable_peg) { - // Hide disabled dGPU device - pci_and_config32(HOST_BRIDGE, DEVEN, ~DEVEN_D1F0EN); - } -} - -void mb_get_spd_map(struct spd_info *spdi) -{ - spdi->addresses[0] = 0x50; - spdi->addresses[2] = 0x51; -} - -const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS] = { - /* Length, Enable, OCn#, Location */ - { 0x0040, 1, 0, USB_PORT_BACK_PANEL }, /* USB3 */ - { 0x0040, 1, 0, USB_PORT_BACK_PANEL }, /* USB3 */ - { 0x0110, 1, 1, USB_PORT_BACK_PANEL }, /* USB2 charge */ - { 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL }, - { 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_DOCK }, - { 0x0080, 1, 2, USB_PORT_BACK_PANEL }, /* USB2 */ - { 0x0040, 1, 3, USB_PORT_BACK_PANEL }, - { 0x0040, 1, 3, USB_PORT_BACK_PANEL }, - { 0x0040, 1, 4, USB_PORT_BACK_PANEL }, - { 0x0110, 1, 4, USB_PORT_BACK_PANEL }, /* WWAN */ - { 0x0040, 1, 5, USB_PORT_INTERNAL }, /* WLAN */ - { 0x0040, 1, 5, USB_PORT_BACK_PANEL }, /* webcam */ - { 0x0080, 1, 6, USB_PORT_BACK_PANEL }, - { 0x0040, 1, 6, USB_PORT_BACK_PANEL }, -}; - -const struct usb3_port_config mainboard_usb3_ports[MAX_USB3_PORTS] = { - { 1, 0 }, - { 1, 0 }, - { 1, USB_OC_PIN_SKIP }, - { 1, USB_OC_PIN_SKIP }, - { 1, 1 }, - { 1, 1 }, /* WWAN */ -}; diff --git a/src/mainboard/lenovo/t440p/smihandler.c b/src/mainboard/lenovo/t440p/smihandler.c deleted file mode 100644 index de48240e88..0000000000 --- a/src/mainboard/lenovo/t440p/smihandler.c +++ /dev/null @@ -1,85 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include -#include -#include -#include -#include -#include -#include - -#define GPE_EC_SCI 1 -#define GPE_EC_WAKE 13 - -static void mainboard_smi_handle_ec_sci(void) -{ - u8 status = inb(EC_SC); - u8 event; - - if (!(status & EC_SCI_EVT)) - return; - - event = ec_query(); - printk(BIOS_DEBUG, "EC event %#02x\n", event); -} - -void mainboard_smi_gpi(u32 gpi_sts) -{ - if (gpi_sts & (1 << GPE_EC_SCI)) - mainboard_smi_handle_ec_sci(); -} - -/* lynxpoint doesn't have gpi_route_interrupt, so add it */ -#define GPI_DISABLE 0x00 -#define GPI_IS_SMI 0x01 -#define GPI_IS_SCI 0x02 -#define GPI_IS_NMI 0x03 - -static void gpi_route_interrupt(u8 gpi, u8 mode) -{ - u32 gpi_rout; - - gpi_rout = pci_read_config32(PCI_DEV(0, 0x1f, 0), GPIO_ROUT); - gpi_rout &= ~(3 << (2 * gpi)); - gpi_rout |= ((mode & 3) << (2 * gpi)); - pci_write_config32(PCI_DEV(0, 0x1f, 0), GPIO_ROUT, gpi_rout); -} - -int mainboard_smi_apmc(u8 data) -{ - switch (data) { - case APM_CNT_ACPI_ENABLE: - /* use 0x1600/0x1604 to prevent races with userspace */ - ec_set_ports(0x1604, 0x1600); - /* route EC_SCI to SCI */ - gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI); - /* discard all events, and enable attention */ - ec_write(0x80, 0x01); - break; - case APM_CNT_ACPI_DISABLE: - /* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't - provide a EC query function */ - ec_set_ports(0x66, 0x62); - /* route EC_SCI to SMI */ - gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI); - /* discard all events, and enable attention */ - ec_write(0x80, 0x01); - break; - default: - break; - } - return 0; -} - -void mainboard_smi_sleep(u8 slp_typ) -{ - if (slp_typ == 3) { - u8 ec_wake = ec_read(0x32); - /* If EC wake events are enabled, - * enable wake on EC WAKE GPE. */ - if (ec_wake & 0x14) { - /* Redirect EC WAKE GPE to SCI. */ - gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI); - } - } -} diff --git a/src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd deleted file mode 100644 index 565cacd3a8..0000000000 --- a/src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd +++ /dev/null @@ -1,21 +0,0 @@ -FLASH@0xff400000 0xc00000 { - SI_ALL 0x20000 { - SI_DESC 0x1000 - SI_GBE 0x2000 - SI_ME - } - SI_BIOS 0xbe0000 { - UNIFIED_MRC_CACHE 0x20000 { - RECOVERY_MRC_CACHE 0x10000 - RW_MRC_CACHE 0x10000 - } - - WP_RO { - FMAP 0x800 - RO_FRID 0x40 - RO_PADDING 0x7c0 - GBB 0x1e000 - COREBOOT(CBFS) - } - } -} diff --git a/src/mainboard/lenovo/t440p/vboot-ro.fmd b/src/mainboard/lenovo/t440p/vboot-ro.fmd deleted file mode 100644 index 6bdd4cc458..0000000000 --- a/src/mainboard/lenovo/t440p/vboot-ro.fmd +++ /dev/null @@ -1,21 +0,0 @@ -FLASH@0xff400000 0xc00000 { - SI_ALL 0x500000 { - SI_DESC 0x1000 - SI_GBE 0x2000 - SI_ME - } - SI_BIOS 0x700000 { - UNIFIED_MRC_CACHE 0x20000 { - RECOVERY_MRC_CACHE 0x10000 - RW_MRC_CACHE 0x10000 - } - - WP_RO { - FMAP 0x800 - RO_FRID 0x40 - RO_PADDING 0x7c0 - GBB 0x1e000 - COREBOOT(CBFS) - } - } -} diff --git a/src/mainboard/lenovo/t440p/vboot-rwab.fmd b/src/mainboard/lenovo/t440p/vboot-rwab.fmd deleted file mode 100644 index 1747c0e708..0000000000 --- a/src/mainboard/lenovo/t440p/vboot-rwab.fmd +++ /dev/null @@ -1,34 +0,0 @@ -FLASH@0xff400000 0xc00000 { - SI_ALL@0x0 0x500000 { - SI_DESC@0x0 0x1000 - SI_GBE@0x1000 0x2000 - SI_ME - } - SI_BIOS@0x500000 0x700000 { - RW_SECTION_A 0x280000 { - VBLOCK_A 0x10000 - FW_MAIN_A(CBFS) - RW_FWID_A 0x40 - } - RW_SECTION_B 0x280000 { - VBLOCK_B 0x10000 - FW_MAIN_B(CBFS) - RW_FWID_B 0x40 - } - UNIFIED_MRC_CACHE@0x500000 0x20000 { - RECOVERY_MRC_CACHE@0x0 0x10000 - RW_MRC_CACHE@0x10000 0x10000 - } - RW_VPD(PRESERVE) 0x1000 - SMMSTORE(PRESERVE)@0x521000 0x40000 - - WP_RO { - FMAP 0x800 - RO_FRID 0x40 - RO_PADDING 0x7c0 - RO_VPD(PRESERVE) 0x1000 - GBB 0x1e000 - COREBOOT(CBFS) - } - } -} -- cgit v1.2.3