From 17295c8288a071fa1198bf9fe2207bbc910fe601 Mon Sep 17 00:00:00 2001 From: Ivy Jian Date: Tue, 19 Dec 2023 16:58:16 +0800 Subject: mb/google/brox: Enable FSP UPD LpDdrDqDqsReTraining FSP default value for LpDdrDqDqsReTraining is 1. For boards that didn't set LpDdrDqDqsReTraining to any value, 0 was being assigned and it caused black screen issue. BUG=b:311450057 BRANCH=NONE TEST=emerge-brox coreboot Change-Id: I4a009076e50408a4f7ff16ddc96a0f2e47b09470 Signed-off-by: Ivy Jian Reviewed-on: https://review.coreboot.org/c/coreboot/+/79646 Reviewed-by: Shelley Chen Tested-by: build bot (Jenkins) Reviewed-by: Karthik Ramasubramanian Reviewed-by: Eric Lai --- src/mainboard/google/brox/variants/baseboard/brox/memory.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/mainboard') diff --git a/src/mainboard/google/brox/variants/baseboard/brox/memory.c b/src/mainboard/google/brox/variants/baseboard/brox/memory.c index dabb653c83..4b03e21423 100644 --- a/src/mainboard/google/brox/variants/baseboard/brox/memory.c +++ b/src/mainboard/google/brox/variants/baseboard/brox/memory.c @@ -61,6 +61,8 @@ static const struct mb_cfg baseboard_memcfg = { .ccc_config = 0x99, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Early Command Training */ }; -- cgit v1.2.3